Suresh Seshadri

According to our database, Suresh Seshadri authored at least 5 papers between 2000 and 2005.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2005

A 4-MB on-chip L2 cache for a 90-nm 1.6-GHz 64-bit microprocessor.

Hugh McIntyre, Dennis Wendell, K. James Lin, P. Kaushik, Suresh Seshadri, Alfred Wang, V. Sundararaman, Ping Wang, Song Kim, Wen-Jay Hsu, Hee-Choul Park, Gideon Levinsky, Jiejun Lu, M. Chirania, Raymond A. Heald, Paul Lazar, Sanjaya Dharmasena

IEEE J. Solid State Circuits, 2005

2003

CMOS Digital Imager Design from a System-on-a-chip Perspective.

Bedabrata Pain, Bruce Hancock, Thomas Cunningham, Guang Yang, Suresh Seshadri, Julie Heynssens, Chris Wrigley

Proceedings of the 16th International Conference on VLSI Design (VLSI Design 2003), 2003

2001

Frequency Response Verification of Analog Circuits Using Global Optimization Techniques.

Suresh Seshadri, Jacob A. Abraham

J. Electron. Test., 2001

CMOS imager with charge-leakage compensated frame difference and sum output.

Bedabrata Pain, Suresh Seshadri, Monico Ortiz, Chris Wrigley, Guang Yang

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

2000

Verification of Delta-Sigma Converters Using Adaptive Regression Modeling.

Jeongjin Roh, Suresh Seshadri, Jacob A. Abraham

Proceedings of the 2000 IEEE/ACM International Conference on Computer-Aided Design, 2000