Surendra S. Rathod

Microelectron. J., 2019

2017

Synapse Circuits Implementation and Analysis in 180 nm MOSFET and CNFET Technology.

[BibT_eX]

[DOI]

Sushma Srivastava

Proceedings of the VLSI Design and Test - 21st International Symposium, 2017

2015

Analysis of CMOS inhibitory synapse with varying neurotransmitter concentration, reuptake time and spread delay.

[BibT_eX]

[DOI]

Pradyumna Galgali

Proceedings of the 19th International Symposium on VLSI Design and Test, 2015

Implementing a cloud based Xilinx ISE FPGA design platform for integrated remote labs.

[BibT_eX]

[DOI]

Proceedings of the 2015 International Conference on Advances in Computing, 2015

2012

Dg-FinFET-Based SRAM Configurations for Increased SEU Immunity.

[BibT_eX]

[DOI]

J. Circuits Syst. Comput., 2012

Analysis of double-gate FinFET-based address decoder for radiation-induced single-event-transients.

[BibT_eX]

[DOI]

IET Circuits Devices Syst., 2012

2011

A low-noise, process-variation-tolerant double-gate FinFET based sense amplifier.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2011

Electrical performance study of 25 nm Omega-FinFET under the influence of gamma radiation: A 3D simulation.

[BibT_eX]

[DOI]

Microelectron. J., 2011

Alpha-particle-induced effects in partially depleted silicon on insulator device: With and without body contact.

[BibT_eX]

[DOI]

IET Circuits Devices Syst., 2011

2010

A proposed DG-FinFET based SRAM cell design with RadHard capabilities.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2010

Robust Double Gate FinFET Based Sense Amplifier Design Using Independent Gate Control.

[BibT_eX]

[DOI]