Surendra Hemaram

According to our database, Surendra Hemaram authored at least 6 papers between 2021 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Soft and Hard Error-Correction Techniques in STT-MRAM.

Surendra Hemaram, Mehdi B. Tahoori, Francky Catthoor, Siddharth Rao, Sebastien Couet, Valerio Pica, Gouri Sankar Kar

IEEE Des. Test, October, 2024

NN-ECC: Embedding Error Correction Codes in Neural Network Weight Memories using Multi-task Learning.

Soyed Tuhin Ahmed, Surendra Hemaram, Mehdi B. Tahoori

Proceedings of the 42nd IEEE VLSI Test Symposium, 2024

Hard Error Correction in STT-MRAM.

Surendra Hemaram, Mehdi B. Tahoori, Francky Catthoor, Siddharth Rao, Sebastien Couet, Gouri Sankar Kar

Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024

2023

A Low Overhead Checksum Technique for Error Correction in Memristive Crossbar for Deep Learning Applications.

Surendra Hemaram, Soyed Tuhin Ahmed, Mahta Mayahinia, Christopher Münch, Mehdi B. Tahoori

Proceedings of the 41st IEEE VLSI Test Symposium, 2023

2022

Adaptive Block Error Correction for Memristive Crossbars.

Surendra Hemaram, Mahta Mayahinia, Mehdi B. Tahoori

Proceedings of the 28th IEEE International Symposium on On-Line Testing and Robust System Design, 2022

2021

Optimal Design of a Decoupling Network Using Variants of Particle Swarm Optimization Algorithm.

Surendra Hemaram, Jai Narayan Tripathi

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021