Surendar Magar

According to our database, Surendar Magar authored at least 4 papers between 1985 and 1988.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of six.

1988

A high performance CMOS chipset for FFT processors.

Shannon Shen, Surendar Magar, Raul Aguilar, Gerry Luikuo, Mike Fleming, K. Rishavy, K. Murphy, C. Furman

Proceedings of the Computer Design: VLSI in Computers and Processors, 1988

An application specific DSP chip set for 100 MHz data rates.

Surendar Magar, Shannon Shen, Gerry Luikuo, Mike Fleming, Raul Aguilar

Proceedings of the IEEE International Conference on Acoustics, 1988

1986

Architecture and applications of a 100-ns CMOS VLSI digital signal processor.

S. Abiko, M. Hashizume, Y. Matsushita, K. Shinozaki, T. Takamizawa, Cole Erskine, Surendar Magar

Proceedings of the IEEE International Conference on Acoustics, 1986

1985

Architecture and applications of a second-generation digital signal processor.

Cole Erskine, Surendar Magar, Edward R. Caudel, Daniel Essig

Proceedings of the IEEE International Conference on Acoustics, 1985