Suraj Sindia
According to our database1,
Suraj Sindia
authored at least 18 papers
between 2009 and 2015.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2015
Defect Level Constrained Optimization of Analog and Radio Frequency Specification Tests.
J. Electron. Test., 2015
Proceedings of the 33rd IEEE VLSI Test Symposium, 2015
2014
Proceedings of the 15th Latin American Test Workshop, 2014
2013
J. Electron. Test., 2013
Proceedings of the 31st IEEE VLSI Test Symposium, 2013
Proceedings of the 2013 IEEE International Test Conference, 2013
2012
Parametric Fault Testing of Non-Linear Analog Circuits Based on Polynomial and V-Transform Coefficients.
J. Electron. Test., 2012
J. Electron. Test., 2012
Proceedings of the 30th IEEE VLSI Test Symposium, 2012
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
Proceedings of the 21st IEEE Asian Test Symposium, 2012
2011
Non-linear analog circuit test and diagnosis under process variation using V-Transform coefficients.
Proceedings of the 29th IEEE VLSI Test Symposium, 2011
Proceedings of the 12th Latin American Test Workshop, 2011
Proceedings of the 20th IEEE Asian Test Symposium, 2011
2010
Parametric Fault Diagnosis of Nonlinear Analog Circuits Using Polynomial Coefficients.
Proceedings of the VLSI Design 2010: 23rd International Conference on VLSI Design, 2010
2009
Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, 2009
Multi-tone Testing of Linear and Nonlinear Analog Circuits Using Polynomial Coefficients.
Proceedings of the Eighteentgh Asian Test Symposium, 2009