Suraj Paul

According to our database1, Suraj Paul authored at least 10 papers between 2017 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2024
An Adaptive Strategy for Dynamic Resource Allocation and Scheduling for Multitasking NoC based Multicore Systems.
Proceedings of the 28th International Symposium on VLSI Design and Test, 2024

2021
Adaptive Task Allocation and Scheduling on NoC-based Multicore Platforms with Multitasking Processors.
ACM Trans. Embed. Comput. Syst., 2021

Dynamic task allocation and scheduling with contention-awareness for Network-on-Chip based multicore systems.
J. Syst. Archit., 2021

A Hybrid Adaptive Strategy for Task Allocation and Scheduling for Multi-applications on NoC-based Multicore Systems with Resource Sharing.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2019
Dynamic Task Mapping and Scheduling with Temperature-Awareness on Network-on-Chip based Multicore Systems.
J. Syst. Archit., 2019

A permanent fault tolerant dynamic task allocation approach for Network-on-Chip based multicore systems.
J. Syst. Archit., 2019

2018
Task mapping and scheduling for network-on-chip based multi-core platform with transient faults.
J. Syst. Archit., 2018

A Dynamic Resource Allocation Strategy for NoC Based Multicore Systems with Permanent Faults.
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

2017
Fault-Tolerant Dynamic Task Mapping and Scheduling for Network-on-Chip-Based Multicore Platform.
ACM Trans. Embed. Comput. Syst., 2017

Deadline and energy aware dynamic task mapping and scheduling for Network-on-Chip based multi-core platform.
J. Syst. Archit., 2017


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