Supamas Sirichotiyakul

According to our database1, Supamas Sirichotiyakul authored at least 11 papers between 1998 and 2003.

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Bibliography

2003
Driver modeling and alignment for worst-case delay noise.
IEEE Trans. Very Large Scale Integr. Syst., 2003

Probabilistic analysis of interconnect coupling noise.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003

2002
Duet: an accurate leakage estimation and optimization tool for dual-V<sub>t</sub> circuits.
IEEE Trans. Very Large Scale Integr. Syst., 2002

Noise propagation and failure criteria for VLSI designs.
Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002

Estimation of the likelihood of capacitive coupling noise.
Proceedings of the 39th Design Automation Conference, 2002

2001
A Global Driver Sizing Tool for Functional Crosstalk Noise Avoidance.
Proceedings of the 2nd International Symposium on Quality of Electronic Design (ISQED 2001), 2001

False-Noise Analysis using Logic Implications.
Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

Driver Modeling and Alignment for Worst-Case Delay Noise.
Proceedings of the 38th Design Automation Conference, 2001

2000
ClariNet: a noise analysis tool for deep submicron design.
Proceedings of the 37th Conference on Design Automation, 2000

1999
Stand-by Power Minimization Through Simultaneous Threshold Voltage Selection and Circuit Sizing.
Proceedings of the 36th Conference on Design Automation, 1999

1998
Emerging power management tools for processor design.
Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998


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