Sunil Rathore

Orcid: 0000-0001-7963-6391

According to our database1, Sunil Rathore authored at least 9 papers between 2017 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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PhD thesis 
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Links

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Bibliography

2024
Self-Heating and Process-Induced Threshold Voltage Aware Reliability and Aging Analysis of Forksheet FET.
Proceedings of the IEEE International Reliability Physics Symposium, 2024

2023
Investigation of Analog/RF and linearity performance with self-heating effect in nanosheet FET.
Microelectron. J., September, 2023

Self-Heating Aware Threshold Voltage Modulation Conforming to Process and Ambient Temperature Variation for Reliable Nanosheet FET.
Proceedings of the IEEE International Reliability Physics Symposium, 2023

Gate Oxide Induced Reliability Assessment of Junctionless FinFET-Based Hydrogen Gas Sensor.
Proceedings of the 2023 IEEE SENSORS, Vienna, Austria, October 29 - Nov. 1, 2023, 2023

2022
Investigation of geometrical impact on a P<sup>+</sup> buried negative capacitance SOI FET.
Microelectron. J., 2022

Substrate BOX engineering to mitigate the self-heating induced degradation in nanosheet transistor.
Microelectron. J., 2022

Insights into the operation of negative capacitance FinFET for low power logic applications.
Microelectron. J., 2022

Impact of Temperature on NDR Characteristics of a Negative Capacitance FinFET: Role of Landau Parameter (α).
Proceedings of the VLSI Design and Test - 26th International Symposium, 2022

2017
Design and implementation of PID controller based on orthogonal wavelet filter-banks in FPGA.
Proceedings of the 7th International Symposium on Embedded Computing and System Design, 2017


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