Sungjoon Kim

Orcid: 0000-0002-2734-5864

According to our database1, Sungjoon Kim authored at least 14 papers between 1994 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
Overshoot-Suppressed Memristor Array with AlN Oxygen Barrier for Low-Power Operation in the Intelligent Neuromorphic Systems.
Adv. Intell. Syst., August, 2024

Explainable Deep-Learning-Based Gait Analysis of Hip-Knee Cyclogram for the Prediction of Adolescent Idiopathic Scoliosis Progression.
Sensors, July, 2024

Threshold learning algorithm for memristive neural network with binary switching behavior.
Neural Networks, 2024

Resting-potential-adjustable soft-reset integrate-and-fire neuron model for highly reliable and energy-efficient hardware-based spiking neural networks.
Neurocomputing, 2024

A Quantized-Weight-Splitting Method of RRAM Arrays for Neuromorphic Applications.
IEEE Access, 2024

2023
Memristor Crossbar Circuit for Ternary Content-Addressable Memory with Fine-Tuning Operation.
Adv. Intell. Syst., March, 2023

2022
4-bit Multilevel Operation in Overshoot Suppressed Al2O3/TiOx Resistive Random-Access Memory Crossbar Array.
Adv. Intell. Syst., 2022

2020
Performance Validation of a Planar Hall Resistance Biosensor through Beta-Amyloid Biomarker.
Sensors, 2020

2002
A 5-Gb/s 0.25-μm CMOS jitter-tolerant variable-interval oversampling clock/data recovery circuit.
IEEE J. Solid State Circuits, 2002

1998
1.04 GBd low EMI digital video interface system using small swing serial link technique.
IEEE J. Solid State Circuits, 1998

1997
A 960-Mb/s/pin interface for skew-tolerant bus using low jitter PLL.
IEEE J. Solid State Circuits, 1997

1995
A single chip iΔ-Σ ADC with a built-in variable gain stage and DAC with a charge integrating subconverter for a 5 V 9600-b/s modem.
IEEE J. Solid State Circuits, August, 1995

A CMOS serial link for fully duplexed data communication.
IEEE J. Solid State Circuits, April, 1995

1994
A Multibit Delta-Sigma D/A Converter Using a Charge Integrating Sub-Converter.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994


  Loading...