Sunghyun Park

Affiliations:
  • Massachusetts Institute of Technology, Cambridge, MA, USA


According to our database1, Sunghyun Park authored at least 9 papers between 2011 and 2016.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2016
Enabling simultaneously bi-directional TSV signaling for energy and area efficient 3D-ICs.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2014
Towards low-power yet high-performance networks-on-chip.
PhD thesis, 2014

SCORPIO: A 36-core research chip demonstrating snoopy coherence on a scalable mesh NoC with in-network ordering.
Proceedings of the ACM/IEEE 41st International Symposium on Computer Architecture, 2014

SCORPIO: 36-core shared memory processor demonstrating snoopy coherence on a mesh interconnect.
Proceedings of the 2014 IEEE Hot Chips 26 Symposium (HCS), 2014

2013
Single-Cycle Multihop Asynchronous Repeated Traversal: A SMART Future for Reconfigurable On-Chip Networks.
Computer, 2013

40.4fJ/bit/mm low-swing on-chip signaling with self-resetting logic repeaters embedded within a mesh NoC in 45nm SOI CMOS.
Proceedings of the Design, Automation and Test in Europe, 2013

SMART: a single-cycle reconfigurable NoC for SoC applications.
Proceedings of the Design, Automation and Test in Europe, 2013

2012
Approaching the theoretical limits of a mesh NoC with a 16-node chip prototype in 45nm SOI.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012

2011
A low-swing crossbar and link generator for low-power networks-on-chip.
Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011


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