Sunghye Park

According to our database, Sunghye Park authored at least 10 papers between 2019 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

QNSA: Quantum Neural Simulated Annealing for Combinatorial Optimization.

Seongbin Kwon, Dohun Kim, Sunghye Park, Seojeong Kim, Seokhyeong Kang

Proceedings of the 25th International Symposium on Quality Electronic Design, 2024

Hybrid Circuit Mapping: Leveraging the Full Spectrum of Computational Capabilities of Neutral Atom Quantum Computers.

Ludwig Schmid, Sunghye Park, Robert Wille

Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

HiLight: A Comprehensive Framework for High-Performance and Lightweight Scalability in Surface Code Communication.

Sunghye Park, Dohun Kim, Seokhyeong Kang

Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

2023

Hybrid Circuit Mapping: Leveraging the Full Spectrum of Computational Capabilities of Neutral Atom Quantum Computers.

Ludwig Schmid, Sunghye Park, Seokhyeong Kang, Robert Wille

CoRR, 2023

ClusterNet: Routing Congestion Prediction and Optimization Using Netlist Clustering and Graph Neural Networks.

Kyungjun Min, Seongbin Kwon, Sung-Yun Lee, Dohun Kim, Sunghye Park, Seokhyeong Kang

Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

2022

MCQA: Multi-Constraint Qubit Allocation for Near-FTQC Device.

Sunghye Park, Dohun Kim, Jae-Yoon Sim, Seokhyeong Kang

Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

A fast and scalable qubit-mapping method for noisy intermediate-scale quantum computers.

Sunghye Park, Daeyeon Kim, Minhyuk Kweon, Jae-Yoon Sim, Seokhyeong Kang

Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2020

A Logic Synthesis Methodology for Low-Power Ternary Logic Circuits.

Sunmean Kim, Sung-Yun Lee, Sunghye Park, Kyung Rok Kim, Seokhyeong Kang

IEEE Trans. Circuits Syst. I Regul. Pap., 2020

2019

Multi-Threshold Voltages Graphene Barristor-Based Ternary ALU.

Sunghye Park, Sunmean Kim, Seokhyeong Kang

Proceedings of the 2019 International SoC Design Conference, 2019

Design of Quad-Edge-Triggered Sequential Logic Circuits for Ternary Logic.

Sunmean Kim, Sung-Yun Lee, Sunghye Park, Seokhyeong Kang

Proceedings of the 2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL), 2019