Sunghoon Chun
According to our database1,
Sunghoon Chun
authored at least 15 papers
between 2003 and 2010.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2010
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010
2009
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009
A High-Level Signal Integrity Fault Model and Test Methodology for Long On-Chip Interconnections.
Proceedings of the 27th IEEE VLSI Test Symposium, 2009
2008
An Effective Power Reduction Methodology for Deterministic BIST Using Auxiliary LFSR.
J. Electron. Test., 2008
Proceedings of the 26th IEEE VLSI Test Symposium (VTS 2008), April 27, 2008
A New Wafer Level Latent Defect Screening Methodology for Highly Reliable DRAM Using a Response Surface Method.
Proceedings of the 2008 IEEE International Test Conference, 2008
An Effective Hybrid Test Data Compression Method Using Scan Chain Compaction and Dictionary-Based Scheme.
Proceedings of the 17th IEEE Asian Test Symposium, 2008
Proceedings of the 17th IEEE Asian Test Symposium, 2008
Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008
2007
J. Electron. Test., 2007
High-MDSI: A High-level Signal Integrity Fault Test Pattern Generation Method for Interconnects.
Proceedings of the 16th Asian Test Symposium, 2007
2006
IEEE Trans. Very Large Scale Integr. Syst., 2006
2004
Proceedings of the 13th Asian Test Symposium (ATS 2004), 2004
2003
Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003