Sung Woo Chung

Jae Jeong Yoo

IEEE Des. Test, 2018

2017

Enhancing Energy Efficiency of Multimedia Applications in Heterogeneous Mobile Multi-Core Processors.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2017

Towards refresh-optimized EDRAM-based caches with a selective fine-grain round-robin refresh scheme.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2017

Architecting large-scale SRAM arrays with monolithic 3D integration.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE/ACM International Symposium on Low Power Electronics and Design, 2017

Signal strength-aware adaptive offloading for energy efficient mobile devices.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE/ACM International Symposium on Low Power Electronics and Design, 2017

An energy-efficient task scheduler for mobile web browsing.

[BibT_eX]

[DOI]

Sang Jun Nam

Proceedings of the IEEE International Conference on Consumer Electronics, 2017

2016

Exploiting Refresh Effect of DRAM Read Operations: A Practical Approach to Low-Power Refresh.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2016

Exploration of temperature-aware refresh schemes for 3D stacked eDRAM caches.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2016

Olfactory identification and white matter integrity in amnestic mild cognitive impairment: A preliminary study.

[BibT_eX]

[DOI]

Int. J. Imaging Syst. Technol., 2016

2015

An Energy-Efficient Last-Level Cache Architecture for Process Variation-Tolerant 3D Microprocessors.

[BibT_eX]

[DOI]

Farinaz Koushanfar

IEEE Trans. Computers, 2015

Stabilizing CPU Frequency and Voltage for Temperature-Aware DVFS in Mobile Devices.

[BibT_eX]

[DOI]

Jae Min Kim

IEEE Trans. Computers, 2015

M-DTM: migration-based dynamic thermal management for heterogeneous mobile multi-core processors.

[BibT_eX]

[DOI]

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2014

Leveraging Process Variation for Performance and Energy: In the Perspective of Overclocking.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2014

Efficacy of an NMDA receptor antagonist for Parkinson's disease dementia: A brain perfusion SPECT study.

[BibT_eX]

[DOI]

In-Uk Song

Yong-An Chung

Int. J. Imaging Syst. Technol., 2014

Measuring Variance between Smartphone Energy Consumption and Battery Life.

[BibT_eX]

[DOI]

Computer, 2014

Application-aware scaling governor for wearable devices.

[BibT_eX]

[DOI]

Jae Min Kim

Proceedings of the 24th International Workshop on Power and Timing Modeling, 2014

2013

Exploiting Application/System-Dependent Ambient Temperature for Accurate Microarchitectural Simulation.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2013

Performance and cache access time of SRAM-eDRAM hybrid caches considering wire delay.

[BibT_eX]

[DOI]

Hyung Beom Jang

Proceedings of the International Symposium on Quality Electronic Design, 2013

Process variation-tolerant 3D microprocessor design: An efficient architectural solution.

[BibT_eX]

[DOI]

Proceedings of 2013 International Conference on IC Design & Technology, 2013

Accurate GPU power estimation for mobile device power profiling.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Consumer Electronics, 2013

2012

Fine-Grain Voltage Tuned Cache Architecture for Yield Management Under Process Variations.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2012

Enhancing online power estimation accuracy for smartphones.

[BibT_eX]

[DOI]

IEEE Trans. Consumer Electron., 2012

Clinical value of cardiac I-123 metaiodobenzylguanidine scintigraphy between Parkinson's disease and Parkinson's disease associated dementia.

[BibT_eX]

[DOI]

Int. J. Imaging Syst. Technol., 2012

Recent thermal management techniques for microprocessors.

[BibT_eX]

[DOI]

ACM Comput. Surv., 2012

An online power estimation technique for multi-core smartphones with advanced display components.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Consumer Electronics, 2012

Exploiting narrow-width values for process variation-tolerant 3-D microprocessors.

[BibT_eX]

[DOI]

Proceedings of the 49th Annual Design Automation Conference 2012, 2012

2011

Display Power Management That Detects User Intent.

[BibT_eX]

[DOI]

Computer, 2011

Exploration of CPU/GPU co-execution: from the perspective of performance, energy, and temperature.

[BibT_eX]

[DOI]

Proceedings of the Research in Applied Computation Symposium, 2011

2010

Energy-Optimal Dynamic Thermal Management: Computation and Cooling Power Co-Optimization.

[BibT_eX]

[DOI]

IEEE Trans. Ind. Informatics, 2010

On the Thermal Attack in Instruction Caches.

[BibT_eX]

[DOI]

IEEE Trans. Dependable Secur. Comput., 2010

Predictive Temperature-Aware DVFS.

[BibT_eX]

[DOI]

Jong Sung Lee

IEEE Trans. Computers, 2010

Load Unbalancing Strategy for Multicore Embedded Processors.

[BibT_eX]

[DOI]

Hyeran Jeon

Woo Hyong Lee

IEEE Trans. Computers, 2010

A fast and simple system performance emulator for enhanced solid state disks: a case study of long read operations.

[BibT_eX]

[DOI]

J. Zhejiang Univ. Sci. C, 2010

Energy-aware instruction cache design using small trace cache.

[BibT_eX]

[DOI]

Jong-Myon Kim

IET Comput. Digit. Tech., 2010

Architecture/OS Support for Embedded Multi-core Systems.

[BibT_eX]

[DOI]

Hsien-Hsin S. Lee

Woo Hyong Lee

Comput. J., 2010

Exploiting application-dependent ambient temperature for accurate architectural simulation.

[BibT_eX]

[DOI]

Proceedings of the 28th International Conference on Computer Design, 2010

Thermal-aware Duplicated Filter Cache for Improving Processor Reliability.

[BibT_eX]

Proceedings of the 2010 International Conference on Computer Design, 2010

2009

Solid-State Disk with Double Data Rate DRAM Interface for High-Performance PCs.

[BibT_eX]

[DOI]

IEICE Trans. Inf. Syst., 2009

The impact of liquid cooling on 3D multi-core processors.

[BibT_eX]

[DOI]

Proceedings of the 27th International Conference on Computer Design, 2009

Energy-optimal dynamic thermal management for green computing.

[BibT_eX]

[DOI]

Proceedings of the 2009 International Conference on Computer-Aided Design, 2009

Exploiting narrow-width values for thermal-aware register file designs.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2009

Selective wordline voltage boosting for caches to manage yield under process variations.

[BibT_eX]

[DOI]

Proceedings of the 46th Design Automation Conference, 2009

2008

Energy and Performance Optimization of Demand Paging With OneNAND Flash.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

On-Demand Solution to Minimize I-Cache Leakage Energy with Maintaining Performance.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2008

Adopting the Drowsy Technique for Instruction Caches: A Soft Error Perspective.

[BibT_eX]

[DOI]

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008

An Accurate and Energy-Efficient Way Determination Technique for Instruction Caches by Early Tab Matching.

[BibT_eX]

[DOI]

Eui-Young Chung

Proceedings of the 4th IEEE International Symposium on Electronic Design, 2008

Energy-Effective Instruction Fetch Unit for Embedded Processors.

[BibT_eX]

[DOI]

Proceedings of the 5th IEEE Consumer Communications and Networking Conference, 2008

2007

Scenario-Aware Bus Functional Modeling for Architecture-Level Performance Analysis.

[BibT_eX]

[DOI]

Eui-Young Chung

Hyuk-Jun Lee

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007

Is the Complicated ECC Array Necessary for Data Caches?

[BibT_eX]

Proceedings of the 2007 International Conference on Computer Design, 2007

2006

PP-cache: A partitioned power-aware instruction cache architecture.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2006

Sim-ARM1136: A case study on the accuracy of the cycle-accurate simulator.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2006

An Energy-Efficient Partitioned Instruction Cache Architecture for Embedded Processors.

[BibT_eX]

[DOI]

IEICE Trans. Inf. Syst., 2006

A Novel Software Solution for Localized Thermal Problems.

[BibT_eX]

[DOI]

Proceedings of the Parallel and Distributed Processing and Applications, 2006

Practice and Experience of an Embedded Processor Core Modeling.

[BibT_eX]

[DOI]

Proceedings of the High Performance Computing and Communications, 2006

Demand paging for OneNAND<sup>TM</sup> Flash eXecute-in-place.

[BibT_eX]

[DOI]

Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, 2006

On the Reliability of Drowsy Instruction Caches.

[BibT_eX]

[DOI]

Soong Hyun Shin

Proceedings of the Advances in Computer Systems Architecture, 11th Asia-Pacific Conference, 2006

Using Branch Prediction Information for Near-Optimal I-Cache Leakage.

[BibT_eX]

[DOI]

Proceedings of the Advances in Computer Systems Architecture, 11th Asia-Pacific Conference, 2006

2005

DRACO: optimized CC-NUMA system with novel dual-link interconnections to reduce the memory latency.

[BibT_eX]

[DOI]

Hyo-Joong Suh

SIGARCH Comput. Archit. News, 2005

Distance-aware L2 cache organizations for scalable multiprocessor systems.

[BibT_eX]

[DOI]

J. Syst. Archit., 2005

A Split L2 Data Cache for Scalable Cc-numa Multiprocessors.

[BibT_eX]

[DOI]

J. Circuits Syst. Comput., 2005

First-Level Instruction Cache Design for Reducing Dynamic Energy Consumption.

[BibT_eX]

[DOI]

Proceedings of the Embedded Computer Systems: Architectures, 2005

An Accurate Architectural Simulator for ARM1136.

[BibT_eX]

[DOI]

Hyo-Joong Suh

Proceedings of the Embedded and Ubiquitous Computing, 2005

2004

A Low-Power Branch Predictor for Embedded Processors.

[BibT_eX]

[DOI]

Gi-Ho Park

Sung-Bae Park

IEICE Trans. Inf. Syst., 2004

A Low-Power Tournament Branch Predictor.

[BibT_eX]

[DOI]

Gi-Ho Park

Sung-Bae Park

IEICE Trans. Inf. Syst., 2004

Utilization of the On-Chip L2 Cache Area in CC-NUMA Multiprocessors for Applications with a Small Working Set.

[BibT_eX]

[DOI]

IEICE Trans. Inf. Syst., 2004

A Low Power Branch Predictor to Selectively Access the BTB.

[BibT_eX]

[DOI]

Sung-Bae Park

Proceedings of the Advances in Computer Systems Architecture, 9th Asia-Pacific Conference, 2004

2002

A Second-Level Cache With the Distance-Aware Replacement Policy for NUMA Systems.

[BibT_eX]

[DOI]

J. Inf. Sci. Eng., 2002

An Effective L2 Cache Replacement Policy to Distribute the Bus Traffic in the SMP Node.

[BibT_eX]

Proceedings of the International Conference on Parallel and Distributed Computing Systems, 2002

2001

Efficient schemes to scale the interconnection network bandwidth in a ring-based multiprocessor system.

[BibT_eX]

[DOI]

Proceedings of the 2001 ACM Symposium on Applied Computing (SAC), 2001

Accelerating the Continuous Data in a SCI-Based Multimedia System.

[BibT_eX]

[DOI]

Proceedings of the Eigth International Conference on Parallel and Distributed Systems, 2001

2000

Analysis of slotted ring network in real-time systems.

[BibT_eX]

Seong Tae Jhang

Proceedings of the ISCA 15th International Conference Computers and Their Applications, 2000

1999

Optimal Interconnection Network Bandwidth for Ring-Based Multiprocessor Systems.

[BibT_eX]

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 1999

1998

PANDA: Ring-Based Multiprocessor System Using New Snooping Protocol.

[BibT_eX]

[DOI]

Seong Tae Jhang