Sung-Joon Jang
Orcid: 0000-0002-6992-408X
According to our database1,
Sung-Joon Jang
authored at least 25 papers
between 2007 and 2024.
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Bibliography
2024
Skew-CIM: Process-Variation-Resilient and Energy-Efficient Computation-in-Memory Design Technique With Skewed Weights.
IEEE Trans. Circuits Syst. I Regul. Pap., May, 2024
FreFlex: A High-Performance Processor for Convolution and Attention Computations via Sparsity-Adaptive Dynamic Frequency Boosting.
IEEE J. Solid State Circuits, March, 2024
Strategic Improvements in CNN Accelerators: Optimizing PE Utilization for MobileNetV2.
Proceedings of the 21st International SoC Design Conference, 2024
Proceedings of the 21st International SoC Design Conference, 2024
An Im2col Architecture Using The Benes Network For Deep Learning Hardware Accelerators.
Proceedings of the 21st International SoC Design Conference, 2024
HAIL-DIMM: Host Access Interleaved with Near-Data Processing on DIMM-based Memory System.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024
52.5 TOPS/W 1.7GHz Reconfigurable XGBoost Inference Accelerator Based on Modular-Unit-Tree with Dynamic Data and Compute Gating.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2024
2023
Deep Learning Accelerators' Configuration Space Exploration Effect on Performance and Resource Utilization: A Gemmini Case Study.
Sensors, March, 2023
Lightweight and Energy-Efficient Deep Learning Accelerator for Real-Time Object Detection on Edge Devices.
Sensors, February, 2023
A Max Pooling Hardware Architecture Supporting Inference And Training For CNN Accelerators.
Proceedings of the 20th International SoC Design Conference, 2023
2022
Proceedings of the 19th International SoC Design Conference, 2022
2021
Proceedings of the 18th International SoC Design Conference, 2021
Proceedings of the 18th International SoC Design Conference, 2021
2020
Resource-Efficient and High-Throughput VLSI Design of Global Optical Flow Method for Mobile Systems.
IEEE Trans. Very Large Scale Integr. Syst., 2020
Noise-Aware and Light-Weight VLSI Design of Bilateral Filter for Robust and Fast Image Denoising in Mobile Systems.
Sensors, 2020
Efficient final output feature map processing method supporting real-time object detection and recognition.
Proceedings of the International SoC Design Conference, 2020
2019
An Implementation of the System on Chip Control System for a FPGA-Based Computer Vision Accelerator.
Proceedings of the 2019 International SoC Design Conference, 2019
Proceedings of the 2019 International SoC Design Conference, 2019
FPGA Design and Implementation of Accelerated Stereo Matching for Obstacle Detection.
Proceedings of the International Conference on Electronics, Information, and Communication, 2019
2018
Proceedings of the International SoC Design Conference, 2018
System Level Power Reduction for YOLO2 Sub-modules for Object Detection of Future Autonomous Vehicles.
Proceedings of the International SoC Design Conference, 2018
2016
Hardware implementation of fast high dynamic range processor for real-time 4K UHD video.
Proceedings of the International SoC Design Conference, 2016
Hardware implementation of fast traffic sign recognition for intelligent vehicle system.
Proceedings of the International SoC Design Conference, 2016
2013
A Fully Integrated Sensor SoC with Digital Calibration Hardware and Wireless Transceiver at 2.4 GHz.
Sensors, 2013
2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007