Sundeep Javvaji

Orcid: 0000-0001-7574-3130

According to our database1, Sundeep Javvaji authored at least 7 papers between 2018 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2024
A Bias-Flip Rectifier With Duty-Cycle-Based MPPT for Piezoelectric Energy Harvesting.
IEEE J. Solid State Circuits, June, 2024

A 120-MHz BW, 122-dBFS SFDR CTΔΣ ADC With a Multi-Path Multi-Frequency Chopping Scheme.
IEEE J. Solid State Circuits, April, 2024

A Beyond-the-rail Audio CTΔΣM with a Passive Input Stage and 99.2dB SNDR.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

2023
A 6GHz Multi-Path Multi-Frequency Chopping CTΔΣ Modulator achieving 122dBFS SFDR from 150kHz to 120MHz BW.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

A Bias-Flip Rectifier with a Duty-Cycle-Based MPPT Algorithm for Piezoelectric Energy Harvesting with 98% Peak MPPT Efficiency and 738% Energy-Extraction Enhancement.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023

2019
Analysis and Design of a Multi-Step Bias-Flip Rectifier for Piezoelectric Energy Harvesting.
IEEE J. Solid State Circuits, 2019

2018
Multi-Step Bias-Flip Rectification for Piezoelectric Energy Harvesting.
Proceedings of the 44th IEEE European Solid State Circuits Conference, 2018


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