Sumit D. Mediratta

According to our database1, Sumit D. Mediratta authored at least 8 papers between 2002 and 2007.

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Bibliography

2007
Characterization of a Fault-tolerant NoC Router.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Performance Evaluation of Probe-Send Fault-tolerant Network-on-chip Router.
Proceedings of the IEEE International Conference on Application-Specific Systems, 2007

2006
A double-data rate (DDR) processing-in-memory (PIM) device with wideword floating-point capability.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005
A Prototype Processing-In-Memory (PIM) Chip for the Data-Intensive Architecture (DIVA) System.
J. VLSI Signal Process., 2005

An area-efficient and protected network interface for processing-in-memory systems.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Performance Analysis of User-Level PIM Communication in the Data IntensiVe Architecture (DIVA) System.
Proceedings of the High Performance Computing, 2005

2004
An Area-Efficient Router for the Data-Intensive Architecture (DIVA) System.
Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004

2002
Implementation of a 32-bit RISC Processor for the Data-Intensive Architecture Processing-In-Memory Chip.
Proceedings of the 13th IEEE International Conference on Application-Specific Systems, 2002


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