Sumit Ahuja

According to our database, Sumit Ahuja authored at least 18 papers between 2007 and 2012.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2012

Low Power Design with High-Level Power Estimation and Power-Aware Synthesis.

Sumit Ahuja, Avinash Lakshminarayana, Sandeep Kumar Shukla

Springer, ISBN: 978-1-4614-0871-0, 2012

2011

High Level Power Estimation Models for FPGAs.

Avinash Lakshminarayana, Sumit Ahuja, Sandeep K. Shukla

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2011

2010

Power Aware High Level Synthesis of Hardware Coprocessors.

Sumit Ahuja, Wei Zhang, Avinash Lakshminarayana, Sandeep K. Shukla

J. Low Power Electron., 2010

A Methodology for Power Aware High-Level Synthesis of Co-processors from Software Algorithms.

Sumit Ahuja, Wei Zhang, Avinash Lakshminarayana, Sandeep K. Shukla

Proceedings of the VLSI Design 2010: 23rd International Conference on VLSI Design, 2010

Coprocessor design space exploration using high level synthesis.

Avinash Lakshminarayana, Sumit Ahuja, Sandeep K. Shukla

Proceedings of the 11th International Symposium on Quality of Electronic Design (ISQED 2010), 2010

System level simulation guided approach to improve the efficacy of clock-gating.

Sumit Ahuja, Wei Zhang, Sandeep K. Shukla

Proceedings of the IEEE International High Level Design Validation and Test Workshop, 2010

The Model Checking View to Clock Gating and Operand Isolation.

Jens Brandt, Klaus Schneider, Sumit Ahuja, Sandeep K. Shukla

Proceedings of the 10th International Conference on Application of Concurrency to System Design, 2010

2009

<i>SCoPE</i>: Statistical Regression Based Power Models for Co-Processors Power Estimation.

Sumit Ahuja, Deepak Mathaikutty, Avinash Lakshminarayana, Sandeep K. Shukla

J. Low Power Electron., 2009

Hardware Coprocessor Synthesis from an ANSI C Specification.

Sumit Ahuja, Swathi T. Gurumani, Chad Spackman, Sandeep K. Shukla

IEEE Des. Test Comput., 2009

Accurate power estimation of hardware co-processors using system level simulation.

Sumit Ahuja, Deepak Mathaikutty, Avinash Lakshminarayana, Sandeep K. Shukla

Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009

Power estimation methodology for a high-level synthesis framework.

Sumit Ahuja, Deepak Mathaikutty, Gaurav Singh, Joe Stetzer, Sandeep K. Shukla, Ajit Dingankar

Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009

MCBCG: Model Checking Based Sequential Clock-Gating.

Sumit Ahuja, Sandeep K. Shukla

Proceedings of the IEEE International High Level Design Validation and Test Workshop, 2009

2008

Applying Verification Collaterals for Accurate Power Estimation.

Sumit Ahuja, Deepak Mathaikutty, Sandeep K. Shukla

Proceedings of the Ninth International Workshop on Microprocessor Test and Verification, 2008

2007

Techniques for Power-Aware Hardware Synthesis from Concurrent Action Oriented Specifications.

Gaurav Singh, Jacob B. Schwartz, Sumit Ahuja, Sandeep K. Shukla

J. Low Power Electron., 2007

Assertion-Based Modal Power Estimation.

Sumit Ahuja, Deepak Mathaikutty, Sandeep K. Shukla, Ajit Dingankar

Proceedings of the Eighth International Workshop on Microprocessor Test and Verification (MTV 2007), 2007

VT Matrix Multiply Design for MEMOCODE '07.

Eric Simpson, Pengyuan Yu, Patrick Schaumont, Sumit Ahuja, Sandeep K. Shukla

Proceedings of the 5th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2007), May 30, 2007

Model-driven test generation for system level validation.

Deepak Mathaikutty, Sumit Ahuja, Ajit Dingankar, Sandeep K. Shukla

Proceedings of the IEEE International High Level Design Validation and Test Workshop, 2007

Complexity of Scheduling in Synthesizing Hardware from Concurrent Action Oriented Specifications.

Gaurav Singh, S. S. Ravi, Sumit Ahuja, Sandeep K. Shukla

Proceedings of the Power-aware Computing Systems, 21.01. - 26.01.2007, 2007