Sumio Tanaka
According to our database1,
Sumio Tanaka
authored at least 3 papers
between 1990 and 2000.
Collaborative distances:
Collaborative distances:
Timeline
1990
1992
1994
1996
1998
2000
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1
2
1
1
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Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2000
A 0.5-μm, 3-V 1T1C, 1-Mbit FRAM with a variable reference bit-line voltage scheme using a fatigue-free reference capacitor.
IEEE J. Solid State Circuits, 2000
1992
A 5-V-only operation 0.6- mu m flash EEPROM with row decoder scheme in triple-well structure.
IEEE J. Solid State Circuits, November, 1992
1990