Sumedh Dhabu
According to our database1,
Sumedh Dhabu
authored at least 15 papers
between 2013 and 2018.
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Bibliography
2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Active IC Metering of Digital Signal Processing Subsystem with Two-Tier Activation for Secure Split Test.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
2017
A New Time-Domain Approach for the Design of Variable FIR Filters Using the Spectral Parameter Approximation Technique.
Circuits Syst. Signal Process., 2017
Proceedings of the International SoC Design Conference, 2017
2016
Design and implementation of digital filters with very high frequency response flexibility for multi-standard wireless communication receivers
PhD thesis, 2016
Design of Modified Second-Order Frequency Transformations Based Variable Digital Filters With Large Cutoff Frequency Range and Improved Transition Band Characteristics.
IEEE Trans. Very Large Scale Integr. Syst., 2016
Design and FPGA Implementation of Reconfigurable Linear-Phase Digital Filter With Wide Cutoff Frequency Range and Narrow Transition Bandwidth.
IEEE Trans. Circuits Syst. II Express Briefs, 2016
Proceedings of the International SoC Design Conference, 2016
2015
Corrigendum to "Low complexity and efficient dynamic spectrum learning and tunable bandwidth access for heterogeneous decentralized cognitive radio networks" [Digital Signal Processing 37 (Feb. 2015) 13-23].
Digit. Signal Process., 2015
Low complexity and efficient dynamic spectrum learning and tunable bandwidth access for heterogeneous decentralized cognitive radio networks.
Digit. Signal Process., 2015
Design of reconfigurable digital filter based on continuously variable fractional delay and interpolation technique.
Proceedings of the 38th International Conference on Telecommunications and Signal Processing, 2015
Low complexity fast filter bank-based channelization in L-DACS1 for aeronautical communications.
Proceedings of the IEEE 13th International New Circuits and Systems Conference, 2015
Reconfigurable digital filter based on fractional delay structure and interpolation technique for wider cutoff frequency range.
Proceedings of the 2015 IEEE International Conference on Digital Signal Processing, 2015
2014
Design of Reconfigurable Filter Bank Architecture Using Improved Coefficient Decimation-Interpolation-Masking Technique for Multi-Standard Wireless Communication Receivers.
J. Low Power Electron., 2014
2013
A low complexity reconfigurable channel filter based on decimation, interpolation and frequency response masking.
Proceedings of the IEEE International Conference on Acoustics, 2013