Sumanth Kamineni

According to our database, Sumanth Kamineni authored at least 10 papers between 2018 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

A Sub-μW Energy-Performance-Aware IoT SoC With a Triple-Mode Power Management Unit for System Performance Scaling, Fast DVFS, and Energy Minimization.

Xinjian Liu, Sumanth Kamineni, Jacob Breiholz, Benton H. Calhoun, Shuo Li

IEEE J. Solid State Circuits, July, 2024

2023

AuxcellGen: A Framework for Autonomous Generation of Analog and Memory Unit Cells.

Sumanth Kamineni, Arvind K. Sharma, Ramesh Harjani, Sachin S. Sapatnekar, Benton H. Calhoun

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

2022

A 194nW Energy-Performance-Aware loT SoC Employing a 5.2nW 92.6% Peak Efficiency Power Management Unit for System Performance Scaling, Fast DVFS and Energy Minimization.

Xinjian Liu, Sumanth Kamineni, Jacob Breiholz, Benton H. Calhoun, Shuo Li

Proceedings of the IEEE International Solid-State Circuits Conference, 2022

2021

MemGen: An Open-Source Framework for Autonomous Generation of Memory Macros.

Sumanth Kamineni, Shourya Gupta, Benton H. Calhoun

Proceedings of the IEEE Custom Integrated Circuits Conference, 2021

2020

Fully-Autonomous SoC Synthesis Using Customizable Cell-Based Analog and Mixed-Signal Circuits Generation.

Tutu Ajayi, Sumanth Kamineni, Morteza Fayazi, Yaswanth K. Cherivirala, Kyumin Kwon, Shourya Gupta, Wenbo Duan, Jeongsup Lee, Chien-Hen Chen, Mehdi Saligane, Dennis Sylvester, David T. Blaauw, Ronald Dreslinski Jr., Benton H. Calhoun, David D. Wentzloff

Proceedings of the VLSI-SoC: Design Trends, 2020

An Open-source Framework for Autonomous SoC Design with Analog Block Generation.

Tutu Ajayi, Sumanth Kamineni, Yaswanth K. Cherivirala, Morteza Fayazi, Kyumin Kwon, Mehdi Saligane, Shourya Gupta, Chien-Hen Chen, Dennis Sylvester, David T. Blaauw, Ronald G. Dreslinski, Benton H. Calhoun, David D. Wentzloff

Proceedings of the 28th IFIP/IEEE International Conference on Very Large Scale Integration, 2020

An 85 nW IoT Node-Controlling SoC for MELs Power-Mode Management and Phantom Energy Reduction.

Shuo Li, Jacob Breiholz, Sumanth Kamineni, Jaeho Im, David D. Wentzloff, Benton H. Calhoun

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019

A 2.5 ppm/°C 1.05-MHz Relaxation Oscillator With Dynamic Frequency-Error Compensation and Fast Start-Up Time.

Ningxi Liu, Rishika Agarwala, Anjana Dissanayake, Daniel S. Truesdell, Sumanth Kamineni, Benton H. Calhoun

IEEE J. Solid State Circuits, 2019

2018

Multiple Combined Write-Read Peripheral Assists in 6T FinFET SRAMs for Low-VMIN IoT and Cognitive Applications.

Arijit Banerjee, Sumanth Kamineni, Benton H. Calhoun

Proceedings of the International Symposium on Low Power Electronics and Design, 2018

A 2.5 ppm/°C 1.05 MHz Relaxation Oscillator with Dynamic Frequency-Error Compensation and 8 µs Start-up Time.

Ningxi Liu, Rishika Agarwala, Anjana Dissanayake, Daniel S. Truesdell, Sumanth Kamineni, Xing Chen, David D. Wentzloff, Benton H. Calhoun

Proceedings of the 44th IEEE European Solid State Circuits Conference, 2018