Suleyman Tosun

According to our database, Suleyman Tosun authored at least 45 papers between 2003 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

DICEguard: enhancing DICE security for IoT devices with periodic memory forensics.

Yusuf Yamak, Suleyman Tosun, Murat Aydos

J. Supercomput., September, 2024

Energy-aware application mapping methods for mesh-based hybrid wireless network-on-chips.

Alperen Cakin, Selma Dilek, Suleyman Tosun

J. Supercomput., July, 2024

2023

Simulated annealing-based high-level synthesis methodology for reliable and energy-aware application specific integrated circuit designs with multiple supply voltages.

Selma Dilek, Suleyman Tosun, Alperen Cakin

Int. J. Circuit Theory Appl., October, 2023

2022

Computation Power and Energy Optimized Task Allocation in Internet of Things.

Inan Kazanci, Suat Ozdemir, Suleyman Tosun

IEEE Trans. Netw. Serv. Manag., December, 2022

A survey on computation offloading and service placement in fog computing-based IoT.

Kaouther Gasmi, Selma Dilek, Suleyman Tosun, Suat Ozdemir

J. Supercomput., 2022

A High-Level Synthesis Methodology for Energy and Reliability-Oriented Designs.

Selma Dilek, Rawan Smri, Suleyman Tosun, Deniz Dal

IEEE Trans. Computers, 2022

Towards QoS-Aware Resource Allocation in Fog Computing: A Theoretical Model.

Selma Dilek, Alma Oracevic, Suleyman Tosun, Suat Ozdemir

Proceedings of the International Symposium on Networks, Computers and Communications, 2022

2021

ILP formulation and heuristic method for energy-aware application mapping on 3D-NoCs.

Yigitcan Nalci, Pinar Kullu, Suleyman Tosun, Ozcan Ozturk

J. Supercomput., 2021

HAFTA: Highly adaptive fault-tolerant routing algorithm for two-dimensional network-on-chips.

Anil Ipek, Suleyman Tosun, Suat Ozdemir

Concurr. Comput. Pract. Exp., 2021

Q-Learning-based Routing Algorithm for 3D Network-on-Chips.

Nurettin Bölücü, Suleyman Tosun

Proceedings of the 24th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2021

2020

Mapping application-specific topology to mesh topology with reconfigurable switches.

Pinar Kullu, Yilmaz Ar, Suleyman Tosun, Suat Ozdemir

IET Comput. Digit. Tech., 2020

Library Characterization of Arithmetic Circuits for Reliability-Aware Designs in SRAM-Based FPGAs.

Akin Gokalan, Suleyman Tosun, Deniz Dal

J. Electron. Test., 2020

2019

Energy-aware and fault-tolerant custom topology design method for network-on-chips.

Pinar Kullu, Suleyman Tosun

Nano Commun. Networks, 2019

Genetic Algorithm-based Reliability Optimization for High-Level Synthesis.

Suleyman Tosun, Tohid Taghizad Gogjeh Yaran

J. Circuits Syst. Comput., 2019

Number Analysis and Operator Detection in Telecommunication Systems.

Murat Berk, Onder Aycicek, Ismail Ay, Seda Gonenc, Suleyman Tosun

Proceedings of the 2019 International Symposium on Networks, Computers and Communications, 2019

MARM-GA: Mapping Applications to Reconfigurable Mesh using Genetic Algorithm.

Pinar Kullu, Suleyman Tosun

Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019

2018

Energy-aware partitioning of fault-tolerant irregular topologies for 3D network-on-chips.

Suleyman Tosun, Vahid Babaei Ajabshir

J. Supercomput., 2018

Evolutionary task allocation in Internet of Things-based application domains.

Enan A. Khalil, Suat Ozdemir, Suleyman Tosun

Future Gener. Comput. Syst., 2018

2017

Improving combinational circuit resilience against soft errors via selective resource allocation.

Tohid Taghizad Gogjeh Yaran, Suleyman Tosun

Proceedings of the 20th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2017

Energy-aware application-specific topology generation for 3D Network-on-Chips.

Arash Barzinmehr, Suleyman Tosun

Proceedings of the 20th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2017

2016

FPGA implementation of a fault-tolerant application-specific NoC design.

Serif Yesil, Suleyman Tosun, Özcan Özturk

Proceedings of the 2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era, 2016

2015

Application mapping algorithms for mesh-based network-on-chip architectures.

Suleyman Tosun, Özcan Özturk, Erencan Ozkan, Meltem Ozen

J. Supercomput., 2015

Fault-Tolerant Topology Generation Method for Application-Specific Network-on-Chips.

Suleyman Tosun, Vahid Babaei Ajabshir, Ozge Mercanoglu, Özcan Özturk

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

Energy reduction in 3D NoCs through communication optimization.

Özcan Özturk, Ismail Akturk, Ismail Kadayif, Suleyman Tosun

Computing, 2015

Moving object detection by a mounted moving camera.

Ozge Mercanoglu Sincan, Vahid Babaei Ajabshir, Hacer Yalim Keles, Suleyman Tosun

Proceedings of the IEEE EUROCON 2015, 2015

2014

Fault-Tolerant Routing for Irregular-Topology-Based Network-on-Chips.

Vahid Babaei Ajabshir, Suleyman Tosun

Proceedings of the Second International Symposium on Computing and Networking, 2014

Fault-Tolerant Irregular Topology Design Method for Network-on-Chips.

Suleyman Tosun, Vahid Babaei Ajabshir, Ozge Mercanoglu, Özcan Özturk

Proceedings of the 17th Euromicro Conference on Digital System Design, 2014

2012

Energy- and reliability-aware task scheduling onto heterogeneous MPSoC architectures.

Suleyman Tosun

J. Supercomput., 2012

Application-specific topology generation algorithms for network-on-chip design.

Suleyman Tosun, Yilmaz Ar, Suat Ozdemir

IET Comput. Digit. Tech., 2012

2011

New heuristic algorithms for energy aware application mapping and routing on mesh-based NoCs.

Suleyman Tosun

J. Syst. Archit., 2011

Cluster-based application mapping method for Network-on-Chip.

Suleyman Tosun

Adv. Eng. Softw., 2011

2010

FIT: Fast Irregular Topology generation algorithm for application specific NoCs.

Suleyman Tosun

IEICE Electron. Express, 2010

2006

Reducing Memory Requirements through Task Recomputation in Embedded Multi-CPU Systems.

Hakduran Koc, Suleyman Tosun, Ozcan Ozturk, Mahmut T. Kandemir

Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006

An ILP Formulation for Task Scheduling on Heterogeneous Chip Multiprocessors.

Suleyman Tosun, Nazanin Mansouri, Mahmut T. Kandemir, Ozcan Ozturk

Proceedings of the Computer and Information Sciences, 2006

Multi-Level On-Chip Memory Hierarchy Design for Embedded Chip Multiprocessors.

Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin, Suleyman Tosun

Proceedings of the 12th International Conference on Parallel and Distributed Systems, 2006

An ILP based approach to address code generation for digital signal processors.

Ozcan Ozturk, Mahmut T. Kandemir, Suleyman Tosun

Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006

Using Task Recomputation During Application Mapping in Parallel Embedded Architectures.

Suleyman Tosun, Mahmut T. Kandemir, Hakduran Koc

Proceedings of the 2006 International Conference on Computer Design & Conference on Computing in Nanotechnology, 2006

A Novel Essential Prime Implicant Identification Method for Exact Direct Cover Logic Minimization.

Sirzat Kahramanli, Suleyman Tosun

Proceedings of the 2006 International Conference on Computer Design & Conference on Computing in Nanotechnology, 2006

2005

Constraint-based Code mapping for heterogeneous Chip multiprocessors.

Suleyman Tosun, Nazanin Mansouri, Mahmut T. Kandemir, Özcan Özturk

Proceedings of the Proceedings 2005 IEEE International SOC Conference, 2005

On-Chip Memory Management for Embedded MpSoC Architectures Based on Data Compression.

Özcan Özturk, Mahmut T. Kandemir, Mary Jane Irwin, Suleyman Tosun

Proceedings of the Proceedings 2005 IEEE International SOC Conference, 2005

An ILP Formulation for Reliability-Oriented High-Level Synthesis.

Suleyman Tosun, Ozcan Ozturk, Nazanin Mansouri, Ercument Arvas, Mahmut T. Kandemir, Yuan Xie, Wei-Lun Hung

Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005

Reliability-Centric Hardware/Software Co-Design.

Suleyman Tosun, Nazanin Mansouri, Ercument Arvas, Mahmut T. Kandemir, Yuan Xie, Wei-Lun Hung

Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005

Reliability-Conscious Process Scheduling under Performance Constraints in FPGA-Based Embedded Systems.

Guilin Chen, Mahmut T. Kandemir, Suleyman Tosun, Ugur Sezer

Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), 2005

Reliability-Centric High-Level Synthesis.

Suleyman Tosun, Nazanin Mansouri, Ercument Arvas, Mahmut T. Kandemir, Yuan Xie

Proceedings of the 2005 Design, 2005

2003

Derving Intermediary RTLs for Verification of Pipelined Synthesized Designs.

Suleyman Tosun, Hakduran Koc, Nazanin Mansouri

Proceedings of the International Conference on VLSI, 2003