Sule Ozev
Orcid: 0000-0002-3636-715X
According to our database1,
Sule Ozev
authored at least 181 papers
between 1999 and 2024.
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Bibliography
2024
Structural Built In Self Test of Analog Circuits using ON/OFF Keying and Delay Monitors.
Proceedings of the 42nd IEEE VLSI Test Symposium, 2024
Calibration and Source Localization Using an Array of Resistive Metal Oxide Gas Sensors.
Proceedings of the 42nd IEEE VLSI Test Symposium, 2024
Multi-Parameter Optimization of mm-Wave Antenna Layout Using Hybrid Modeling and Incremental Model Learning.
Proceedings of the 42nd IEEE VLSI Test Symposium, 2024
Increasing the Efficiency of Hierarchical Fault Simulation through Functional Fault Clustering.
Proceedings of the 67th IEEE International Midwest Symposium on Circuits and Systems, 2024
Hierarchical Fault Simulation for Mixed-Signal Circuits Using Template Based Fault Response Modeling.
Proceedings of the IEEE European Test Symposium, 2024
2023
IEEE Des. Test, August, 2023
IMPRoVED: Integrated Method to Predict PostRouting setup Violations in Early Design Stages.
ACM Trans. Design Autom. Electr. Syst., July, 2023
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023
Proceedings of the IEEE International Test Conference, 2023
Proceedings of the IEEE European Test Symposium, 2023
Proceedings of the IEEE European Test Symposium, 2023
2022
An In-Field Programmable Adaptive CMOS LNA for Intelligent IoT Sensor Node Applications.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
Digital Fault-based Built-in Self-test and Evaluation of Low Dropout Voltage Regulators.
ACM J. Emerg. Technol. Comput. Syst., 2022
Proceedings of the 40th IEEE VLSI Test Symposium, 2022
Performance Degradation Monitoring for Analog Circuits Using Lightweight Built-in Components.
Proceedings of the 40th IEEE VLSI Test Symposium, 2022
Proceedings of the 40th IEEE VLSI Test Symposium, 2022
Proceedings of the IEEE International Conference on Acoustics, 2022
Guaranteed Activation of Capacitive Trojan Triggers During Post Production Test via Supply Pulsing.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022
2021
ACM Trans. Design Autom. Electr. Syst., 2021
Malicious Activity Detection in Lightweight Wearable and IoT Devices Using Signal Stitching.
Sensors, 2021
Maintaining NIST-Traceability for MEMS Sensors via In-Field Electrical Recalibration.
Proceedings of the 39th IEEE VLSI Test Symposium, 2021
Background Receiver IQ Imbalance Correction for in-Field and Post-Production Testing and Calibration.
Proceedings of the IEEE International Test Conference, 2021
Discrete Cosine Transform Based Causal Convolutional Neural Network for Drift Compensation in Chemical Sensors.
Proceedings of the IEEE International Conference on Acoustics, 2021
2020
IEEE Trans. Emerg. Top. Comput., 2020
IEEE Trans. Circuits Syst. I Regul. Pap., 2020
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
Found. Trends Electron. Des. Autom., 2020
Determining Mechanical Stress Testing Parameters for FHE Designs with Low Computational Overhead.
IEEE Des. Test, 2020
Self-Interference Signal Path Characterization in Full-Duplex Transceivers Using Built-in Self-Test.
Proceedings of the 2020 IEEE Radio and Wireless Symposium, 2020
Enabling Large-scale Fine-grained Simulation of IED Vapor Concentration in Open-air Environments.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020
Design Optimization for N-port RF Network Reflectometers under Noise and Gain Imperfections.
Proceedings of the IEEE International Test Conference, 2020
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020
Proceedings of the IEEE European Test Symposium, 2020
2019
Adaptive Test for RF/Analog Circuit Using Higher Order Correlations among Measurements.
ACM Trans. Design Autom. Electr. Syst., 2019
Knowledge- and Simulation-Based Synthesis of Area-Efficient Passive Loop Filter Incremental Zoom-ADC for Built-In Self-Test Applications.
ACM Trans. Design Autom. Electr. Syst., 2019
J. Electron. Test., 2019
On-Chip RF Phased Array Characterization with DC-Only Measurements for In-Field Calibration.
IEEE Des. Test, 2019
Proceedings of the 37th IEEE VLSI Test Symposium, 2019
Proceedings of the 37th IEEE VLSI Test Symposium, 2019
Proceedings of the IEEE International Conference on Acoustics, 2019
Proceedings of the 24th IEEE European Test Symposium, 2019
2018
ACM Trans. Design Autom. Electr. Syst., 2018
ACM Trans. Design Autom. Electr. Syst., 2018
ACM Trans. Design Autom. Electr. Syst., 2018
Online Built-In Self-Test of High Switching Frequency DC-DC Converters Using Model Reference Based System Identification Techniques.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018
Proceedings of the 36th IEEE VLSI Test Symposium, 2018
Proceedings of the 36th IEEE VLSI Test Symposium, 2018
Proceedings of the 36th IEEE VLSI Test Symposium, 2018
Proceedings of the 36th IEEE VLSI Test Symposium, 2018
Enabling fast process variation and fault simulation through macromodelling of analog components.
Proceedings of the 27th IEEE North Atlantic Test Workshop, 2018
2017
ACM Trans. Design Autom. Electr. Syst., 2017
Adaptive Reduction of the Frequency Search Space for Multi-V<sub>dd</sub> Digital Circuits Using Variation Sensitive Ring Oscillators.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017
Proceedings of the 8th IEEE Latin American Symposium on Circuits & Systems, 2017
Proceedings of the IEEE International Test Conference, 2017
Proceedings of the International Test Conference in Asia, 2017
Receiver echo cancellation with real-time self calibration for passive implanted neuron recorders.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Proceedings of the 22nd IEEE European Test Symposium, 2017
Proceedings of the Twelfth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis Companion, 2017
2016
IEEE Trans. Very Large Scale Integr. Syst., 2016
IEEE Trans. Very Large Scale Integr. Syst., 2016
Process Independent Design Methodology for the Active RC and Single-Inverter-Based Rail Clamp.
ACM Trans. Design Autom. Electr. Syst., 2016
ACM Trans. Design Autom. Electr. Syst., 2016
Proceedings of the 34th IEEE VLSI Test Symposium, 2016
Proceedings of the 17th International Symposium on Quality Electronic Design, 2016
Proceedings of the 17th International Symposium on Quality Electronic Design, 2016
Post-production adaptation of RF circuits for application-specific performance metrics.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Proceedings of the 35th International Conference on Computer-Aided Design, 2016
2015
Built-In Self-Test of Transmitter I/Q Mismatch and Nonlinearity Using Self-Mixing Envelope Detector.
IEEE Trans. Very Large Scale Integr. Syst., 2015
ACM Trans. Design Autom. Electr. Syst., 2015
IEEE Des. Test, 2015
Proceedings of the 33rd IEEE VLSI Test Symposium, 2015
Enabling unauthorized RF transmission below noise floor with no detectable impact on primary communication performance.
Proceedings of the 33rd IEEE VLSI Test Symposium, 2015
Proceedings of the 33rd IEEE VLSI Test Symposium, 2015
Proceedings of the 2015 IEEE International Test Conference, 2015
Proceedings of the 20th IEEE European Test Symposium, 2015
On-chip measurement of bandgap reference voltage using a small form factor VCO based zoom-in ADC.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
2014
Proceedings of the 32nd IEEE VLSI Test Symposium, 2014
A built-in self-test technique for load inductance and lossless current sensing of DC-DC converters.
Proceedings of the 32nd IEEE VLSI Test Symposium, 2014
Development and empirical verification of an accuracy model for the power down leakage tests.
Proceedings of the 32nd IEEE VLSI Test Symposium, 2014
Proceedings of the 32nd IEEE VLSI Test Symposium, 2014
Built-in self-test and characterization of polar transmitter parameters in the loop-back mode.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
Approximating the age of RF/analog circuits through re-characterization and statistical estimation.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
2013
Per-Device Adaptive Test for Analog/RF Circuits Using Entropy-Based Process Monitoring.
IEEE Trans. Very Large Scale Integr. Syst., 2013
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013
Measurement of envelope/phase path delay skew and envelope path bandwidth in polar transmitters.
Proceedings of the 31st IEEE VLSI Test Symposium, 2013
Proceedings of the 2013 IEEE International Test Conference, 2013
Proceedings of the 18th IEEE European Test Symposium, 2013
Analytical modeling for EVM in OFDM transmitters including the effects of IIP3, I/Q imbalance, noise, AM/AM and AM/PM distortion.
Proceedings of the 18th IEEE European Test Symposium, 2013
Proceedings of the Design, Automation and Test in Europe, 2013
Proceedings of the Design, Automation and Test in Europe, 2013
Proceedings of the Design, Automation and Test in Europe, 2013
2012
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012
Test Signal Development and Analysis for OFDM Systems RF Front-End Parameter Extraction.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012
Proceedings of the 30th IEEE VLSI Test Symposium, 2012
Proceedings of the 17th IEEE European Test Symposium, 2012
Adaptive multi-site testing for analog/mixed-signal circuits incorporating neighborhood information.
Proceedings of the 17th IEEE European Test Symposium, 2012
Proceedings of the 17th IEEE European Test Symposium, 2012
An analytical technique for characterization of transceiver IQ imbalances in the loop-back mode.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
2011
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011
J. Electron. Test., 2011
Proceedings of the 29th IEEE VLSI Test Symposium, 2011
Proceedings of the 2011 IEEE International Test Conference, 2011
Proceedings of the 16th European Test Symposium, 2011
Proceedings of the 16th European Test Symposium, 2011
Proceedings of the 16th European Test Symposium, 2011
2010
IEEE Trans. Very Large Scale Integr. Syst., 2010
IEEE Trans. Very Large Scale Integr. Syst., 2010
Adaptive test flow for mixed-signal/RF circuits using learned information from device under test.
Proceedings of the 2011 IEEE International Test Conference, 2010
2009
IEEE Trans. Very Large Scale Integr. Syst., 2009
Low-Cost Characterization and Calibration of RF Integrated Circuits through I - Q Data Analysis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009
A Packet Based 2x-Site Test Solution for GSM Transceivers with Limited Tester Resources.
Proceedings of the 27th IEEE VLSI Test Symposium, 2009
Proceedings of the 2009 IEEE International Test Conference, 2009
Defect-based test optimization for analog/RF circuits for near-zero DPPM applications.
Proceedings of the 27th International Conference on Computer Design, 2009
Proceedings of the 14th IEEE European Test Symposium, 2009
Proceedings of the 46th Design Automation Conference, 2009
2008
Parametric variability analysis for multistage analog circuits using analytical sensitivity modeling.
ACM Trans. Design Autom. Electr. Syst., 2008
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008
Single-Measurement Diagnostic Test Method for Parametric Faults of I/Q Modulating RF Transceivers.
Proceedings of the 26th IEEE VLSI Test Symposium (VTS 2008), April 27, 2008
Proceedings of the 2008 IEEE International Test Conference, 2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Proceedings of the 26th International Conference on Computer Design, 2008
Reducing the impact of intra-core process variability with criticality-based resource allocation and prefetching.
Proceedings of the 5th Conference on Computing Frontiers, 2008
2007
IEEE Trans. Very Large Scale Integr. Syst., 2007
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007
ACM Trans. Archit. Code Optim., 2007
SIGARCH Comput. Archit. News, 2007
Proceedings of the 25th IEEE VLSI Test Symposium (VTS 2007), 2007
Proceedings of the 2007 IEEE International Test Conference, 2007
Proceedings of the 2007 IEEE International Test Conference, 2007
Proceedings of the 2007 IEEE International Test Conference, 2007
Low-cost run-time diagnosis of hard delay faults in the functional units of a microprocessor.
Proceedings of the 25th International Conference on Computer Design, 2007
Proceedings of the 25th International Conference on Computer Design, 2007
Proceedings of the 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007), 2007
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
AWafer-Level Defect Screening Technique to Reduce Test and Packaging Costs for "Big-D/Small-A" Mixed-Signal SoCs.
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007
Reducing the Impact of Process Variability with Prefetching and Criticality-Based Resource Allocation.
Proceedings of the 16th International Conference on Parallel Architectures and Compilation Techniques (PACT 2007), 2007
2006
IEEE Trans. Very Large Scale Integr. Syst., 2006
ACM Trans. Design Autom. Electr. Syst., 2006
Identifying the Source of BW Failures in High-Frequency Linear Analog Circuits Based on S-Parameter Measurements.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006
J. Electron. Test., 2006
Proceedings of the 24th IEEE VLSI Test Symposium (VTS 2006), 30 April, 2006
Proceedings of the Joint International Conference on Measurement and Modeling of Computer Systems, 2006
Proceedings of the 2006 IEEE International Test Conference, 2006
A Robust, Self-Tuning CMOS Circuit for Built-in Go/No-Go Testing of Synthesizer Phase Noise.
Proceedings of the 2006 IEEE International Test Conference, 2006
Proceedings of the 24th International Conference on Computer Design (ICCD 2006), 2006
Proceedings of the 2006 International Conference on Computer-Aided Design, 2006
2005
IEEE Trans. Dependable Secur. Comput., 2005
Diagnosis of Failing Component in RF Receivers through Adaptive Full-Path Measurements.
Proceedings of the 23rd IEEE VLSI Test Symposium (VTS 2005), 2005
Proceedings of the 38th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-38 2005), 2005
Proceedings of the Proceedings 2005 IEEE International Test Conference, 2005
Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005
Fast Hierarchical Process Variability Analysis and Parametric Test Development for Analog/RF Circuits.
Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005
Parametric test development for RF circuits targeting physical fault locations and using specification-based fault definitions.
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005
Proceedings of the 2005 Design, 2005
Hierarchical Variance Analysis for Analog Circuits Based on Graph Modelling and Correlation Loop Tracing.
Proceedings of the 2005 Design, 2005
Circuit-Level Modeling for Concurrent Testing of Operational Defects due to Gate Oxide Breakdown.
Proceedings of the 2005 Design, 2005
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
2004
Design of concurrent test Hardware for Linear analog circuits with constrained hardware overhead.
IEEE Trans. Very Large Scale Integr. Syst., 2004
IEEE Des. Test Comput., 2004
Proceedings of the 22nd IEEE VLSI Test Symposium (VTS 2004), 2004
Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004
Proceedings of the 22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 2004
Diagnosis of small-signal parameters for broadband amplifiers through S-parameter measurements and sensitivity-guided evolutionary search.
Proceedings of the 2004 International Conference on Computer-Aided Design, 2004
Proceedings of the 2004 International Conference on Dependable Systems and Networks (DSN 2004), 28 June, 2004
2003
J. Electron. Test., 2003
Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003
Proceedings of the 2003 International Conference on Computer-Aided Design, 2003
2002
IEEE Des. Test Comput., 2002
Boosting the Accuracy of Analog Test Coverage Computation through Statistical Tolerance Analysis.
Proceedings of the 20th IEEE VLSI Test Symposium (VTS 2002), Without Testing It's a Gamble, 28 April, 2002
Proceedings of the 3rd International Symposium on Quality of Electronic Design, 2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Proceedings of the 20th International Conference on Computer Design (ICCD 2002), 2002
2001
Testability implications in low-cost integrated radio transceivers: a Bluetooth case study.
Proceedings of the Proceedings IEEE International Test Conference 2001, Baltimore, MD, USA, 30 October, 2001
2000
Proceedings of the 18th IEEE VLSI Test Symposium (VTS 2000), 30 April, 2000
Block-Based Test Integration for Analog Integrated Circuits.
Proceedings of the 1st Latin American Test Workshop, 2000
1999
Proceedings of the 14th International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT '99), 1999