Sujan K. Gonugondla
Orcid: 0000-0003-4743-6461
According to our database1,
Sujan K. Gonugondla
authored at least 33 papers
between 2015 and 2024.
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Bibliography
2024
The N-Grammys: Accelerating Autoregressive Inference with Learning-Free Batched Speculation.
CoRR, 2024
Proceedings of the Forty-first International Conference on Machine Learning, 2024
Proceedings of the Findings of the Association for Computational Linguistics, 2024
Proceedings of the Findings of the Association for Computational Linguistics, 2024
2023
CoRR, 2023
Proceedings of the 31st ACM Joint European Software Engineering Conference and Symposium on the Foundations of Software Engineering, 2023
Proceedings of the Eleventh International Conference on Learning Representations, 2023
PRIVE: Efficient RRAM Programming with Chip Verification for RRAM-based In-Memory Computing Acceleration.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
2022
Fundamental Limits on Energy-Delay-Accuracy of In-Memory Architectures in Inference Applications.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
Proceedings of the IEEE International Conference on Acoustics, 2022
2021
A 0.44-μJ/dec, 39.9-μs/dec, Recurrent Attention In-Memory Processor for Keyword Spotting.
IEEE J. Solid State Circuits, 2021
2020
PhD thesis, 2020
Proc. IEEE, 2020
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020
KeyRAM: A 0.34 uJ/decision 18 k decisions/s Recurrent Attention In-memory Processor for Keyword Spotting.
Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020
Proceedings of the 54th Asilomar Conference on Signals, Systems, and Computers, 2020
2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Proceedings of the 53rd Asilomar Conference on Signals, Systems, and Computers, 2019
2018
IEEE J. Solid State Circuits, 2018
A 19.4-nJ/Decision, 364-K Decisions/s, In-Memory Random Forest Multi-Class Inference Accelerator.
IEEE J. Solid State Circuits, 2018
IEEE J. Solid State Circuits, 2018
IEEE J. Emerg. Sel. Topics Circuits Syst., 2018
A 42pJ/decision 3.12TOPS/W robust in-memory machine learning classifier with on-chip training.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
PROMISE: An End-to-End Design of a Programmable Mixed-Signal Accelerator for Machine-Learning Algorithms.
Proceedings of the 45th ACM/IEEE Annual International Symposium on Computer Architecture, 2018
2017
A 19.4 nJ/decision 364K decisions/s in-memory random forest classifier in 6T SRAM array.
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017
2016
A 481pJ/decision 3.4M decision/s Multifunctional Deep In-memory Inference Processor using Standard 6T SRAM Array.
CoRR, 2016
Proceedings of the 2016 IEEE International Conference on Acoustics, 2016
2015
An energy-efficient memory-based high-throughput VLSI architecture for convolutional networks.
Proceedings of the 2015 IEEE International Conference on Acoustics, 2015