Sugil Lee

Orcid: 0000-0003-3092-6501

According to our database1, Sugil Lee authored at least 17 papers between 2018 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2024
PyAIM: Pynq-Based Scalable Analog In-Memory Computing Prototyping Platform.
Proceedings of the 6th IEEE International Conference on AI Circuits and Systems, 2024

2023
Training-Free Stuck-At Fault Mitigation for ReRAM-Based Deep Learning Accelerators.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., July, 2023

Offline Training-Based Mitigation of IR Drop for ReRAM-Based Deep Neural Network Accelerators.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., February, 2023

NTT-PIM: Row-Centric Architecture and Mapping for Efficient Number-Theoretic Transform on PIM.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022
MLogNet: A Logarithmic Quantization-Based Accelerator for Depthwise Separable Convolution.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Accurate Prediction of ReRAM Crossbar Performance Under I-V Nonlinearity and IR Drop.
Proceedings of the IEEE 40th International Conference on Computer Design, 2022

Multi-Fidelity Nonideality Simulation and Evaluation Framework for Resistive Neuromorphic Computing.
Proceedings of the 56th Asilomar Conference on Signals, Systems, and Computers, ACSSC 2022, Pacific Grove, CA, USA, October 31, 2022

2021
Fast and Low-Cost Mitigation of ReRAM Variability for Deep Learning Applications.
Proceedings of the 39th IEEE International Conference on Computer Design, 2021

Cost- and Dataset-free Stuck-at Fault Mitigation for ReRAM-based Deep Learning Accelerators.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

Automated Log-Scale Quantization for Low-Cost Deep Neural Networks.
Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition, 2021

2020
IR-QNN Framework: An IR Drop-Aware Offline Training of Quantized Crossbar Arrays.
IEEE Access, 2020

Architecture-Accuracy Co-optimization of ReRAM-based Low-cost Neural Network Processor.
Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020

Learning to Predict IR Drop with Effective Training for ReRAM-based Neural Network Hardware.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019
Double MAC on a DSP: Boosting the Performance of Convolutional Neural Networks on FPGAs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

Successive Log Quantization for Cost-Efficient Neural Networks Using Stochastic Computing.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019

On-chip memory optimization for high-level synthesis of multi-dimensional data on FPGA.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

2018
Sign-magnitude SC: getting 10X accuracy for free in stochastic computing for deep neural networks.
Proceedings of the 55th Annual Design Automation Conference, 2018


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