Sudipta Debnath

According to our database, Sudipta Debnath authored at least 7 papers between 2015 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

A Novel FPGA-Driven HD-SPWM Architecture With Zero-Sequence Voltage Insertion Strategy for Three-Level NPC Inverter.

Rishiraj Sarker, Avik Bhattacharya, Sudipta Debnath, Alejandro Castillo Atoche, Asim Datta

IEEE Trans. Ind. Informatics, September, 2024

A New Lissajous-Based Technique for Islanding Detection in Microgrid.

Yadala Pavankumar, Sudipta Debnath, Subrata Paul

IEEE Trans. Smart Grid, May, 2024

2023

Design and Analysis of Regular Clock Based 2: 4 Decoder Using T-Gate in QCA.

Amit Kumar Pramanik, Sudipta Debnath, Jayanta Pal, Bibhash Sen

Proceedings of Second Asian Symposium on Cellular Automata Technology, 2023

2022

An Improved Multicarrier PWM (MCPWM) Technique With a New Harmonic Mitigation Strategy for Cascaded H-Bridge Multilevel Inverter Applications.

Rishiraj Sarker, Asim Datta, Sudipta Debnath

IEEE Trans. Ind. Informatics, 2022

2021

FPGA-Based High-Definition SPWM Generation With Harmonic Mitigation Property for Voltage Source Inverter Applications.

Rishiraj Sarker, Asim Datta, Sudipta Debnath

IEEE Trans. Ind. Informatics, 2021

2020

FPGA-based variable modulation-indexed-SPWM generator architecture for constant-output-voltage inverter applications.

Rishiraj Sarker, Asim Datta, Sudipta Debnath

Microprocess. Microsystems, 2020

2015

Transmission line fault detection and classification using cross-correlation and k-nearest neighbor.

Aritra Dasgupta, Sudipta Debnath, Arabinda Das

Int. J. Knowl. Based Intell. Eng. Syst., 2015