Sudipa Mandal

Orcid: 0000-0002-8952-3638

According to our database1, Sudipa Mandal authored at least 8 papers between 2017 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2022
Migrating Assertions From Dense to Discrete Time.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

2021
Usage-Driven Personalization of Power Management Logic.
IEEE Embed. Syst. Lett., 2021

An RL based Approach for Thermal-Aware Energy Optimized Task Scheduling in Multi-core Processors.
Proceedings of the 34th International Conference on VLSI Design and 20th International Conference on Embedded Systems, 2021

2020
Assertions for Protecting Mixed-Signal Latency Contracts in Power Management.
IEEE Trans. Very Large Scale Integr. Syst., 2020

2018
Formal Methods for Coverage Analysis of Power Management Logic with Mixed-Signal Components.
Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018

AMS-Miner: Mining AMS Assertions Using Interval Arithmetic.
Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018

On the Deep Structure of Ragas and Analytic Rating of Music Scores.
Proceedings of the Heritage Preservation - A Computational Approach, 2018

2017
Formal Verification of Power Management Logic with Mixed-Signal Domains.
Proceedings of the 30th International Conference on VLSI Design and 16th International Conference on Embedded Systems, 2017


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