Sudip Ghosh

According to our database, Sudip Ghosh authored at least 14 papers between 2012 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

Implementation of Area Efficient Adders for Inexact Computing.

Rounak Roy, Sudip Ghosh, Hafizur Rahaman

Proceedings of the International Symposium on Devices, Circuits and Systems, 2023

Hardware Performance Analysis of N-bit CLA on FPGA and Programmable SoC.

Piyali Saha, Sudip Ghosh, Debajyoti Pal, Hafizur Rahaman

Proceedings of the 13th International Conference on Advances in Information Technology, 2023

Power and Delay Efficient Hardware Implementation with ATPG for Vedic Multiplier Using Urdhva Tiryagbhyam Sutra.

Anchit Arun, Ananya Chakraborty, Priyanka Dutta, Debajyoti Pal, Tridibesh Nag, Debasis De, Sudip Ghosh, Hafizur Rahaman

Proceedings of the 13th International Conference on Advances in Information Technology, 2023

2022

Hardware Design with Real-Time Implementation for Security of Medical Images and EPMR.

Sudip Ghosh, Yuvam Bhateja, Joshua Roy Palathinkal, Hafizur Rahaman

Circuits Syst. Signal Process., 2022

2020

A New Digital Color Image Watermarking Algorithm with its FPGA and ASIC Implementation.

Shivdeep, Sudip Ghosh, Hafizur Rahaman

Proceedings of the 3rd International Symposium on Devices, Circuits and Systems, 2020

A New Blind Invisible and Semi-Fragile Colour Image Watermarking Scheme in Spatial Domain.

Joshua Roy Palathinkal, Yuvam Bhateja, Sudip Ghosh, Hafizur Rahaman

Proceedings of the 3rd International Symposium on Devices, Circuits and Systems, 2020

2018

FPGA implementation of semi-fragile reversible watermarking by histogram bin shifting in real time.

Sambaran Hazra, Sudip Ghosh, Sayandip De, Hafizur Rahaman

J. Real Time Image Process., 2018

Correction to: VLSI-Based Pipeline Architecture for Reversible Image Watermarking by Difference Expansion with High-Level Synthesis Approach.

Subhajit Das, Sudip Ghosh, Nachiketa Das, Santi P. Maity, Hafizur Rahaman, Reshmi Maity, Niladri Maity

Circuits Syst. Signal Process., 2018

2016

A rule-based approach for minimizing power dissipation of digital circuits.

Subrata Das, Parthasarathi Dasgupta, Petr Fiser, Sudip Ghosh, Debesh Kumar Das

Proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2016

2015

Field Programmable Gate Array and System-on-Chip Based Implementation of Discrete Fast Walsh-Hadamard Transform Domain Image Watermarking Architecture for Real-Time Applications.

Sudip Ghosh, Arijit Biswas, Santi Prasad Maity, Hafizur Rahaman

J. Low Power Electron., 2015

An adaptive feedback based reversible watermarking algorithm using difference expansion.

Sudip Ghosh, Nachiketa Das, Subhajit Das, Santi Prasad Maity, Hafizur Rahaman

Proceedings of the 2nd IEEE International Conference on Recent Trends in Information Systems, 2015

2014

Design of a Low Complexity and Fast Hardware Architecture for Digital Image Watermarking in FWHT Domain on FPGA.

Sudip Ghosh, Arijit Biswas, Santi P. Maity, Hafizur Rahaman

Proceedings of the 2014 Fifth International Symposium on Electronic System Design, 2014

Digital Design and Pipelined Architecture for Reversible Watermarking Based on Difference Expansion Using FPGA.

Sudip Ghosh, Nachiketa Das, Subhajit Das, Santi P. Maity, Hafizur Rahaman

Proceedings of the 2014 International Conference on Information Technology, 2014

2012

VLSI Architecture for Spatial Domain Spread Spectrum Image Watermarking Using Gray-Scale Watermark.

Sudip Ghosh, Somsubhra Talapatra, Debasish Mondal, Navonil Chatterjee, Hafizur Rahaman, Santi P. Maity

Proceedings of the Progress in VLSI Design and Test - 16th International Symposium, 2012