Sudha Ellison Mathe

Orcid: 0000-0003-2806-5407

According to our database1, Sudha Ellison Mathe authored at least 7 papers between 2017 and 2024.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of six.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
CNC: A lightweight architecture for Binary Ring-LWE based PQC.
Microprocess. Microsystems, 2024

A comprehensive review on applications of Raspberry Pi.
Comput. Sci. Rev., 2024

Multi-LFSR Architectures for BRLWE-Based Post Quantum Cryptography.
IEEE Access, 2024

2021
A systematic literature review on prototyping with Arduino: Applications, challenges, advantages, and limitations.
Comput. Sci. Rev., 2021

2018
Design and Implementation of a Novel Bit-Parallel Systolic Multiplier Over GF(2<sup><i>m</i></sup>) for Irreducible Pentanomials.
J. Circuits Syst. Comput., 2018

Bit-parallel systolic multiplier over GF ( 2 m ) for irreducible trinomials with ASIC and FPGA implementations.
IET Circuits Devices Syst., 2018

2017
Design and Implementation of a Sequential Polynomial Basis Multiplier over GF(2m).
KSII Trans. Internet Inf. Syst., 2017


  Loading...