Suchismita Roy
Orcid: 0000-0002-7313-1453
According to our database1,
Suchismita Roy
authored at least 38 papers
between 2005 and 2024.
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Bibliography
2024
J. Circuits Syst. Comput., 2024
2023
Toward the Generation of Test Vectors for the Detection of Hardware Trojan Targeting Effective Switching Activity.
ACM J. Emerg. Technol. Comput. Syst., October, 2023
Biomed. Signal Process. Control., August, 2023
ACM Trans. Embed. Comput. Syst., 2023
Non-invasive anaemia detection by examining palm pallor: A smartphone-based approach.
Biomed. Signal Process. Control., 2023
2022
J. Circuits Syst. Comput., 2022
Int. J. Circuit Theory Appl., 2022
2021
J. Circuits Syst. Comput., 2021
J. Electron. Test., 2021
Proceedings of the 18th International Conference on Security and Cryptography, 2021
2020
Corrigendum to: "Linear time algorithm to cover and hit a set of line segments optimally by two axis-parallel squares" [Theor. Comput. Sci. 769 (2019) 63-74].
Theor. Comput. Sci., 2020
J. Circuits Syst. Comput., 2020
Efficient Algorithm for Computing the Triangle Maximizing the Length of Its Smallest Side Inside a Convex Polygon.
Int. J. Found. Comput. Sci., 2020
2019
IEEE Trans. Very Large Scale Integr. Syst., 2019
Linear time algorithm to cover and hit a set of line segments optimally by two axis-parallel squares.
Theor. Comput. Sci., 2019
J. Circuits Syst. Comput., 2019
J. Electron. Test., 2019
Corrigendum to: "Linear time algorithm to cover and hit a set of line segments optimally by two axis-parallel squares", Theoretical Computer Science 769 (2019) 63-74.
CoRR, 2019
Test Configuration Generation for Different FPGA Architectures for Application Independent Testing.
Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019
Proceedings of the 32nd IEEE International System-on-Chip Conference, 2019
2018
Power Optimization Techniques for High-Level Designs Using Multiple Voltage Components for Low Power Consumption.
J. Low Power Electron., 2018
XOR based Methodology to Detect Hardware Trojan utilizing the Transition Probability.
Proceedings of the 8th International Symposium on Embedded Computing and System Design, 2018
2017
J. Circuits Syst. Comput., 2017
K-nearest neighbour (KNN) approach using SAT based technique for rectilinear steiner tree construction.
Proceedings of the 7th International Symposium on Embedded Computing and System Design, 2017
Computing the Triangle Maximizing the Length of Its Smallest Side Inside a Convex Polygon.
Proceedings of the Computational Science and Its Applications - ICCSA 2017, 2017
Proceedings of the Computing and Combinatorics - 23rd International Conference, 2017
2016
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016
Proceedings of the Sixth International Symposium on Embedded Computing and System Design, 2016
2015
Microelectron. J., 2015
Proceedings of the 19th International Symposium on VLSI Design and Test, 2015
2013
Proceedings of the VLSI Design and Test, 17th International Symposium, 2013
Proceedings of the Sixth International Conference on Contemporary Computing, 2013
2012
2010
Microelectron. J., 2010
2008
IEEE Trans. Very Large Scale Integr. Syst., 2008
2007
ACM Trans. Design Autom. Electr. Syst., 2007
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007
2005
SAT based solutions for consistency problems in formal property specifications for open systems.
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005