Subramanian Chebiyam

According to our database1, Subramanian Chebiyam authored at least 4 papers between 2005 and 2015.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2015
Designing efficient combinational compression architecture for testing industrial circuits.
Proceedings of the 19th International Symposium on VLSI Design and Test, 2015

Designing effective scan compression solutions for industrial circuits.
Proceedings of the Sixteenth International Symposium on Quality Electronic Design, 2015

2014
A Case Study on Implementing Compressed DFT Architecture.
Proceedings of the 23rd IEEE Asian Test Symposium, 2014

2005
Power and Design for Test: A Design Automation Perspective.
J. Low Power Electron., 2005


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