Subrahmanyam Boyapati

According to our database, Subrahmanyam Boyapati authored at least 3 papers between 2017 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

A 1.2 V Double-Tail StrongARM Latch Comparator with 51 fJ/comparison and 380 μV Input Noise in 65 nm CMOS Technology.

Srinivasa Rao Maram, Subrahmanyam Boyapati, Vijay Shankar Pasupureddi

Proceedings of the 25th International Symposium on Quality Electronic Design, 2024

Modeling and Design of Highly EMI Immune CMOS OpAmp Topologies.

Subrahmanyam Boyapati

Proceedings of the 14th International Workshop on the Electromagnetic Compatibility of Integrated Circuits, 2024

2017

Design of A Novel Highly EMI-Immune CMOS Miller OpAmp Considering Channel Length Modulation.

Subrahmanyam Boyapati, Jean-Michel Redoute, Maryam Shojaei Baghini

IEEE Trans. Circuits Syst. I Regul. Pap., 2017