Subodh Wairya

According to our database, Subodh Wairya authored at least 15 papers between 2010 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

Design and Analysis of Low Power and High-Speed Dynamic Comparator with Transconductance Enhanced in Latching Stage for ADC Application.

Anurag Yadav, Subodh Wairya

J. Circuits Syst. Comput., July, 2024

2023

Carry look-ahead and ripple carry method based 4-bit carry generator circuit for implementing wide-word length adder.

Anum Khan, Arindom Chakraborty, Upal Barua Joy, Subodh Wairya, Mehedi Hasan

Microelectron. J., October, 2023

A 6.7 GHz, 89.33 μW Power and 81.26% Tuning Range Dual Input Ring VCO with PMOS Varactor.

Mohd Saqib, Subodh Wairya, Anurag Yadav

J. Circuits Syst. Comput., August, 2023

Design Analysis of an Energy-Efficient Low-Power Dynamic Comparator Using NMOS Based Preamplifier.

Abhinav Saxena, Anurag Yadav, Subodh Wairya

Proceedings of the 14th International Conference on Computing Communication and Networking Technologies, 2023

2021

Hybrid deep neural network with adaptive galactic swarm optimization for text extraction from scene images.

Digvijay Pandey, Binay Kumar Pandey, Subodh Wairya

Soft Comput., 2021

Prediction of Breast Cancer Using Extremely Randomized Clustering Forests (ERCF) Technique: Prediction of Breast Cancer.

Akhil Gupta, Rohit Anand, Digvijay Pandey, Nidhi Sindhwani, Subodh Wairya, Binay Kumar Pandey, Manvinder Sharma

Int. J. Distributed Syst. Technol., 2021

2019

Novel Lossless Grounded and Floating Inductance Simulators Employing a Grounded Capacitor Based on CC-CFA.

Amrita Singh, Manoj Kumar Jain, Subodh Wairya

J. Circuits Syst. Comput., 2019

2017

Testable Novel Parity-Preserving Reversible Gate and Low-Cost Quantum Decoder Design in 1D Molecular-QCA.

Neeraj Kumar Misra, Bibhash Sen, Subodh Wairya, Bandan Kumar Bhoi

J. Circuits Syst. Comput., 2017

Novel conservative reversible error control circuits based on molecular QCA.

Neeraj Kumar Misra, Bibhash Sen, Subodh Wairya

Int. J. Comput. Appl. Technol., 2017

2015

Evolution of structure of some binary group based n bit comparator, n-to-2n decoder by reversible technique.

Neeraj Kumar Misra, Subodh Wairya, Vinod Kumar Singh

CoRR, 2015

Cost Efficient Design of Reversible Adder Circuits for Low Power Applications.

Neeraj Kumar Misra, Mukesh Kumar Kushwaha, Subodh Wairya, Amit Kumar

CoRR, 2015

Feasible methodology for optimization of a novel reversible binary compressor.

Neeraj Kumar Misra, Mukesh Kumar Kushwaha, Subodh Wairya, Amit Kumar

CoRR, 2015

Optimized Approach for Reversible Code Converters Using Quantum Dot Cellular Automata.

Neeraj Kumar Misra, Subodh Wairya, Vinod Kumar Singh

Proceedings of the 4th International Conference on Frontiers in Intelligent Computing: Theory and Applications, 2015

2012

Performance Analysis of High Speed Hybrid CMOS Full Adder Circuits for Low Voltage VLSI Design.

Subodh Wairya, Rajendra Kumar Nagaria, Sudarshan Tiwari

VLSI Design, 2012

2010

On the New Design of sinusoid voltage Controlled oscillators Using Multiplier in CFA-Based Double Integrator Loop.

Rajendra Kumar Nagaria, Rakesh Kumar Singh, Subodh Wairya

J. Circuits Syst. Comput., 2010