Subhasis Chattopadhyay

According to our database, Subhasis Chattopadhyay authored at least 8 papers between 2015 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Parallelization of Garfield++ and neBEM to simulate space-charge effects in RPCs.

Tanay Dey, Purba Bhattacharya, Supratik Mukhopadhyay, Nayana Majumdar, Abhishek Seal, Subhasis Chattopadhyay

Comput. Phys. Commun., January, 2024

2017

Efficient dynamic priority based soft error mitigation techniques for configuration memory of FPGA hardware.

Swagata Mandal, Rourab Paul, Suman Sau, Amlan Chakrabarti, Subhasis Chattopadhyay

Microprocess. Microsystems, 2017

2016

A Novel Method for Soft Error Mitigation in FPGA Using Modified Matrix Code.

Swagata Mandal, Rourab Paul, Suman Sau, Amlan Chakrabarti, Subhasis Chattopadhyay

IEEE Embed. Syst. Lett., 2016

2015

High speed fault tolerant secure communication for muon chamber using fpga based gbt emulator.

Suman Sau, Swagata Mandal, Jogender Saini, Amlan Chakrabarti, Subhasis Chattopadhyay

CoRR, 2015

FPGA based High Speed Data Acquisition System for High Energy Physics Application.

Swagata Mandal, Suman Sau, Amlan Chakrabarti, Subhasis Chattopadhyay

CoRR, 2015

A Novel Method for Soft Error Mitigation in FPGA using Adaptive Cross Parity Code.

Swagata Mandal, Rourab Paul, Suman Sau, Amlan Chakrabarti, Subhasis Chattopadhyay

CoRR, 2015

FPGA Based Novel High Speed DAQ System Design with Error Correction.

Swagata Mandal, Suman Sau, Amlan Chakrabarti, Jogendra Saini, Sushanta Kumar Pal, Subhasish Chattopadhyay

Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015

FPGA Implementation of High Speed Latency Optimized Optical Communication System Based on Orthogonal Concatenated Code.

Swagata Mandal, Suman Sau, Amlan Chakrabarti, Sushanta Kumar Pal, Subhasish Chattopadhyay

Proceedings of the 24th IEEE Asian Test Symposium, 2015