Subhash J. Patel

Orcid: 0000-0001-6221-8169

According to our database1, Subhash J. Patel authored at least 3 papers between 2018 and 2019.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2019
Parameter Space Exploration for Analog Circuit Design Using Enhanced Bee Colony Algorithm.
J. Circuits Syst. Comput., 2019

Parasitic-Aware Automatic Analog CMOS Circuit Design Environment.
Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019

2018
Parasitic Aware Automatic Analog CMOS Circuit Design Environment Using ABC Algorithm.
Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018


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