Subhadip Kundu
According to our database1,
Subhadip Kundu
authored at least 23 papers
between 2008 and 2024.
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Bibliography
2024
Revisiting Test Compression Configuration in Context of Multi-Core Testing Using Packetized Scan Network.
Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024
2022
Proceedings of the IEEE International Test Conference, 2022
2017
Diagnosing multiple faulty chains with low pin convolution compressor using compressed production test set.
Proceedings of the IEEE International Test Conference, 2017
2016
Proceedings of the 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, 2016
Handling wrong mapping: A new direction towards better diagnosis with low pin convolution compressors.
Proceedings of the 2016 IEEE International Test Conference, 2016
2015
Scan Chain Masking for Diagnosis of Multiple Chain Failures in a Space Compaction Environment.
IEEE Trans. Very Large Scale Integr. Syst., 2015
A hardware based low temperature solution for VLSI testing using decompressor side masking.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
2014
Framework for Multiple-Fault Diagnosis Based on Multiple Fault Simulation Using Particle Swarm Optimization.
IEEE Trans. Very Large Scale Integr. Syst., 2014
2013
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013
Proceedings of the 18th IEEE European Test Symposium, 2013
Proceedings of the 50th Annual Design Automation Conference 2013, 2013
Thermal Aware Don't Care Filling to Reduce Peak Temperature and Thermal Variance during Testing.
Proceedings of the 22nd Asian Test Symposium, 2013
2012
Customizing completely specified pattern set targeting dynamic and leakage power reduction during testing.
Integr., 2012
Int. J. Comput. Aided Eng. Technol., 2012
Proceedings of the 25th International Conference on VLSI Design, 2012
Particle Swarm Optimization Based BIST Design for Memory Cores in Mesh Based Network-on-Chip.
Proceedings of the Progress in VLSI Design and Test - 16th International Symposium, 2012
Proceedings of the International Symposium on Electronic System Design, 2012
2011
Multiple Fault Diagnosis Based on Multiple Fault Simulation Using Particle Swarm Optimization.
Proceedings of the VLSI Design 2011: 24th International Conference on VLSI Design, 2011
2010
Customizing pattern set for test power reduction via improved X-identification and reordering.
Proceedings of the 2010 International Symposium on Low Power Electronics and Design, 2010
2009
Test Pattern Selection and Customization Targeting Reduced Dynamic and Leakage Power Consumption.
Proceedings of the Eighteentgh Asian Test Symposium, 2009
Proceedings of the ARTCom 2009, 2009
2008
Proceedings of the IEEE Reglon 10 Colloquium and Third International Conference on Industrial and Information Systems, 2008