Stuart F. Oberman

Orcid: 0000-0003-3522-5966

According to our database1, Stuart F. Oberman authored at least 21 papers between 1996 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

Online presence:

On csauthors.net:

Bibliography

2023
ChipNeMo: Domain-Adapted LLMs for Chip Design.
CoRR, 2023

2022
Guest Editorial: Special Section on Emerging and Impacting Trends on Computer Arithmetic.
IEEE Trans. Emerg. Top. Comput., 2022

FP8 Formats for Deep Learning.
CoRR, 2022

2021
PrefixRL: Optimization of Parallel Prefix Circuits using Deep Reinforcement Learning.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2017
Introduction to the Special Issue on Computer Arithmetic.
IEEE Trans. Computers, 2017

2008
NVIDIA Tesla: A Unified Graphics and Computing Architecture.
IEEE Micro, 2008

2005
High-Speed Function Approximation Using a Minimax Quadratic Interpolator.
IEEE Trans. Computers, 2005

A High-Performance Area-Efficient Multifunction Interpolator.
Proceedings of the 17th IEEE Symposium on Computer Arithmetic (ARITH-17 2005), 2005

Pain versus Gain in the Hardware Design of FPUs and Supercomputers.
Proceedings of the 17th IEEE Symposium on Computer Arithmetic (ARITH-17 2005), 2005

1999
AMD 3DNow! technology: architecture and implementations.
IEEE Micro, 1999

A seventh-generation x86 microprocessor.
IEEE J. Solid State Circuits, 1999

Floating Point Division and Square Root Algorithms and Implementation in the AMD-K7 Microprocessor.
Proceedings of the 14th IEEE Symposium on Computer Arithmetic (Arith-14 '99), 1999

1998
Minimizing the complexity of SRT tables.
IEEE Trans. Very Large Scale Integr. Syst., 1998

Reducing the Mean Latency of Floating-Point Addition.
Theor. Comput. Sci., 1998

1997
Division Algorithms and Implementations.
IEEE Trans. Computers, 1997

Design Issues in Division and Other Floating-Point Operations.
IEEE Trans. Computers, 1997

The SNAP Project: Building Validated Floating Point.
J. Univers. Comput. Sci., 1997

The SNAP Project: Design of Floating Point Arithmetic Unit.
Proceedings of the 13th Symposium on Computer Arithmetic (ARITH-13 '97), 1997

SRT Division Architectures and Implementations.
Proceedings of the 13th Symposium on Computer Arithmetic (ARITH-13 '97), 1997

1996
Reducing division latency with reciprocal caches.
Reliab. Comput., 1996

A Variable Latency Pipelined Floating-Point Adder.
Proceedings of the Euro-Par '96 Parallel Processing, 1996


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