Stuart Biles
Orcid: 0000-0002-7898-915X
According to our database1,
Stuart Biles
authored at least 8 papers
between 2005 and 2017.
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Bibliography
2017
2009
Way guard: a segmented counting bloom filter approach to reducing energy for set-associative caches.
Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009
2008
Energy-Efficient Simultaneous Thread Fetch from Different Cache Levels in a Soft Real-Time SMT Processor.
Proceedings of the Embedded Computer Systems: Architectures, 2008
2007
Low-cost Techniques for Reducing Branch Context Pollution in a Soft Realtime Embedded Multithreaded Processor.
Proceedings of the 19th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2007), 2007
Thread Priority-Aware Random Replacement in TLBs for a High-Performance Real-Time SMT Processor.
Proceedings of the Advances in Computer Systems Architecture, 2007
2006
Proceedings of the 2006 International Conference on Compilers, 2006
Proceedings of the Architecture of Computing Systems, 2006
2005
An Architecture Framework for Transparent Instruction Set Customization in Embedded Processors.
Proceedings of the 32st International Symposium on Computer Architecture (ISCA 2005), 2005