Steven M. Burns

According to our database, Steven M. Burns authored at least 51 papers between 1989 and 2024.

Collaborative distances:

• Dijkstra number of two.
• Erdős number of three.

2024

Constructive Place-and-Route for FinFET-Based Transistor Arrays in Analog Circuits Under Nonlinear Gradients.

Arvind K. Sharma, Meghna Madhusudan, Steven M. Burns, Soner Yaldiz, Parijat Mukherjee, Ramesh Harjani, Sachin S. Sapatnekar

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2024

2023

A Generalized Methodology for Well Island Generation and Well-tap Insertion in Analog/Mixed-signal Layouts.

Ramprasath Srinivasa Gopalakrishnan, Meghna Madhusudan, Arvind K. Sharma, Jitesh Poojary, Soner Yaldiz, Ramesh Harjani, Steven M. Burns, Sachin S. Sapatnekar

ACM Trans. Design Autom. Electr. Syst., September, 2023

GNN-Based Hierarchical Annotation for Analog Circuits.

Kishor Kunal, Tonmoy Dhar, Meghna Madhusudan, Jitesh Poojary, Arvind K. Sharma, Wenbin Xu, Steven M. Burns, Jiang Hu, Ramesh Harjani, Sachin S. Sapatnekar

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., September, 2023

Reusing GEMM Hardware for Efficient Execution of Depthwise Separable Convolution on ASIC-Based DNN Accelerators.

Susmita Dey Manasi, Suvadeep Banerjee, Abhijit Davare, Anton A. Sorokin, Steven M. Burns, Desmond A. Kirkpatrick, Sachin S. Sapatnekar

Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023

2022

Analog/Mixed-Signal Layout Optimization using Optimal Well Taps.

Ramprasath S, Meghna Madhusudan, Arvind K. Sharma, Jitesh Poojary, Soner Yaldiz, Ramesh Harjani, Steven M. Burns, Sachin S. Sapatnekar

Proceedings of the ISPD 2022: International Symposium on Physical Design, Virtual Event, Canada, March 27, 2022

A Charge Flow Formulation for Guiding Analog/Mixed-Signal Placement.

Tonmoy Dhar, Ramprasath S, Jitesh Poojary, Soner Yaldiz, Steven M. Burns, Ramesh Harjani, Sachin S. Sapatnekar

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

2021

ALIGN: A System for Automating Analog Layout.

Tonmoy Dhar, Kishor Kunal, Yaguang Li, Meghna Madhusudan, Jitesh Poojary, Arvind K. Sharma, Wenbin Xu, Steven M. Burns, Ramesh Harjani, Jiang Hu, Desmond A. Kirkpatrick, Parijat Mukherjee, Soner Yaldiz, Sachin S. Sapatnekar

IEEE Des. Test, 2021

A Highly Configurable Hardware/Software Stack for DNN Inference Acceleration.

Suvadeep Banerjee, Steve Burns, Pasquale Cocchini, Abhijit Davare, Shweta Jain, Desmond Kirkpatrick, Anton Sorokin, Jin Yang, Zhenkun Yang

CoRR, 2021

Machine Learning Techniques in Analog Layout Automation.

Tonmoy Dhar, Kishor Kunal, Yaguang Li, Yishuang Lin, Meghna Madhusudan, Jitesh Poojary, Arvind K. Sharma, Steven M. Burns, Ramesh Harjani, Jiang Hu, Parijat Mukherjee, Soner Yaldiz, Sachin S. Sapatnekar

Proceedings of the ISPD '21: International Symposium on Physical Design, 2021

Performance-Aware Common-Centroid Placement and Routing of Transistor Arrays in Analog Circuits.

Arvind K. Sharma, Meghna Madhusudan, Steven M. Burns, Soner Yaldiz, Parijat Mukherjee, Ramesh Harjani, Sachin S. Sapatnekar

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

Common-Centroid Layouts for Analog Circuits: Advantages and Limitations.

Arvind K. Sharma, Meghna Madhusudan, Steven M. Burns, Parijat Mukherjee, Soner Yaldiz, Ramesh Harjani, Sachin S. Sapatnekar

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020

Learning from Experience: Applying ML to Analog Circuit Design.

Kishor Kunal, Tonmoy Dhar, Yaguang Li, Meghna Madhusudan, Jitesh Poojary, Arvind K. Sharma, Wenbin Xu, Steven M. Burns, Ramesh Harjani, Jiang Hu, Parijat Mukherjee, Sachin S. Sapatnekar

Proceedings of the ISPD 2020: International Symposium on Physical Design, Taipei, Taiwan, March 29, 2020

The ALIGN Open-Source Analog Layout Generator: v1.0 and Beyond (Invited talk).

Tonmoy Dhar, Kishor Kunal, Yaguang Li, Yishuang Lin, Meghna Madhusudan, Jitesh Poojary, Arvind K. Sharma, Steven M. Burns, Ramesh Harjani, Jiang Hu, Parijat Mukherjee, Soner Yaldiz, Sachin S. Sapatnekar

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

GANA: Graph Convolutional Network Based Automated Netlist Annotation for Analog Circuits.

Kishor Kunal, Tonmoy Dhar, Meghna Madhusudan, Jitesh Poojary, Arvind K. Sharma, Wenbin Xu, Steven M. Burns, Jiang Hu, Ramesh Harjani, Sachin S. Sapatnekar

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019

Pin Access-Driven Design Rule Clean and DFM Optimized Routing of Standard Cells under Boolean Constraints.

Nikolay Ryzhenko, Steven M. Burns, Anton Sorokin, Mikhail Talalay

Proceedings of the 2019 International Symposium on Physical Design, 2019

ALIGN: Open-Source Analog Layout Automation from the Ground Up.

Kishor Kunal, Meghna Madhusudan, Arvind K. Sharma, Wenbin Xu, Steven M. Burns, Ramesh Harjani, Jiang Hu, Desmond A. Kirkpatrick, Sachin S. Sapatnekar

Proceedings of the 56th Annual Design Automation Conference 2019, 2019

2018

A Template-Based Design Methodology for Graph-Parallel Hardware Accelerators.

Andrey Ayupov, Serif Yesil, Muhammet Mustafa Ozdal, Taemin Kim, Steven M. Burns, Ozcan Ozturk

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

A FPGA Accelerator for Real-Time 3D Non-rigid Registration Using Tree Reweighted Message Passing and Dynamic Markov Random Field Generation.

Michael Barrow, Steven M. Burns, Ryan Kastner

Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018

2017

Graph Analytics Accelerators for Cognitive Systems.

Muhammet Mustafa Ozdal, Serif Yesil, Taemin Kim, Andrey Ayupov, John Greth, Steven M. Burns, Ozcan Ozturk

IEEE Micro, 2017

2016

Energy Efficient Architecture for Graph Analytics Accelerators.

Muhammet Mustafa Ozdal, Serif Yesil, Taemin Kim, Andrey Ayupov, John Greth, Steven M. Burns, Özcan Özturk

Proceedings of the 43rd ACM/IEEE Annual International Symposium on Computer Architecture, 2016

2015

Wavelet-Based Trace Alignment Algorithms for Heterogeneous Architectures.

Muhammet Mustafa Ozdal, Aamer Jaleel, Paolo Narváez, Steven M. Burns, Ganapati Srinivasa

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

Hardware Accelerator Design for Data Centers.

Serif Yesil, Muhammet Mustafa Ozdal, Taemin Kim, Andrey Ayupov, Steven M. Burns, Ozcan Ozturk

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

Architectural Requirements for Energy Efficient Execution of Graph Analytics Applications.

Muhammet Mustafa Ozdal, Serif Yesil, Taemin Kim, Andrey Ayupov, Steven M. Burns, Ozcan Ozturk

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

2013

An improved benchmark suite for the ISPD-2013 discrete cell sizing contest.

Muhammet Mustafa Ozdal, Chirayu Amin, Andrey Ayupov, Steven M. Burns, Gustavo R. Wilke, Cheng Zhuo

Proceedings of the International Symposium on Physical Design, 2013

Trace alignment algorithms for offline workload analysis of heterogeneous architectures.

Muhammet Mustafa Ozdal, Aamer Jaleel, Paolo Narváez, Steven M. Burns, Ganapati Srinivasa

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013

2012

Algorithms for Gate Sizing and Device Parameter Selection for High-Performance Designs.

Muhammet Mustafa Ozdal, Steven M. Burns, Jiang Hu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012

The ISPD-2012 discrete cell sizing contest and benchmark suite.

Muhammet Mustafa Ozdal, Chirayu Amin, Andrey Ayupov, Steven M. Burns, Gustavo R. Wilke, Cheng Zhuo

Proceedings of the International Symposium on Physical Design, 2012

Standard cell routing via boolean satisfiability.

Nikolai Ryzhenko, Steven M. Burns

Proceedings of the 49th Annual Design Automation Conference 2012, 2012

2011

Gate sizing and device technology selection algorithms for high-performance industrial designs.

Muhammet Mustafa Ozdal, Steven M. Burns, Jiang Hu

Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011

A trace compression algorithm targeting power estimation of long benchmarks.

Andrey Ayupov, Steven M. Burns

Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011

Physical synthesis onto a layout fabric with regular diffusion and polysilicon geometries.

Nikolai Ryzhenko, Steven M. Burns

Proceedings of the 48th Design Automation Conference, 2011

2007

Comparative Analysis of Conventional and Statistical Design Techniques.

Steven M. Burns, Mahesh Ketkar, Noel Menezes, Keith A. Bowman, James W. Tschanz, Vivek De

Proceedings of the 44th Design Automation Conference, 2007

2002

Lazy transition systems and asynchronous circuit synthesis withrelative timing assumptions.

Jordi Cortadella, Michael Kishinevsky, Steven M. Burns, Alex Kondratyev, Luciano Lavagno, Ken S. Stevens, Alexander Taubin, Alexandre Yakovlev

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002

Total power optimization by simultaneous dual-Vt allocation and device sizing in high performance microprocessors.

Tanay Karnik, Yibin Ye, James W. Tschanz, Liqiong Wei, Steven M. Burns, Venkatesh Govindarajulu, Vivek De, Shekhar Borkar

Proceedings of the 39th Design Automation Conference, 2002

1999

Synthesis of asynchronous control circuits with automatically generated relative timing assumptions.

Jordi Cortadella, Michael Kishinevsky, Steven M. Burns, Ken S. Stevens

Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999

CAD Directions for High Performance Asynchronous Circuits.

Ken S. Stevens, Shai Rotem, Steven M. Burns, Jordi Cortadella, Ran Ginosar, Michael Kishinevsky, Marly Roncken

Proceedings of the 36th Conference on Design Automation, 1999

1998

Model Checking Large Software Specifications.

William Chan, Richard J. Anderson, Paul Beame, Steve Burns, Francesmary Modugno, David Notkin, Jon Damon Reese

IEEE Trans. Software Eng., 1998

1997

Bounded Delay Timing Analysis of a Class of CSP Programs.

Henrik Hulgaard, Steven M. Burns

Formal Methods Syst. Des., 1997

1996

General conditions for the decomposition of state holding elements.

Steven M. Burns

Proceedings of the 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '96), 1996

1995

Placement and routing tools for the Triptych FPGA.

Carl Ebeling, Larry McMurchie, Scott Hauck, Steven M. Burns

IEEE Trans. Very Large Scale Integr. Syst., 1995

The Triptych FPGA architecture.

Gaetano Borriello, Carl Ebeling, Scott Hauck, Steven M. Burns

IEEE Trans. Very Large Scale Integr. Syst., 1995

An Algorithm for Exact Bounds on the Time Separation of Events in Concurrent Systems.

Henrik Hulgaard, Steven M. Burns, Tod Amon, Gaetano Borriello

IEEE Trans. Computers, 1995

Testing asynchronous circuits: A survey.

Henrik Hulgaard, Steven M. Burns, Gaetano Borriello

Integr., 1995

Efficient Timing Analysis of a Class of Petri Nets.

Henrik Hulgaard, Steven M. Burns

Proceedings of the Computer Aided Verification, 1995

1994

An FPGA for Implementing Asynchronous Circuits.

Scott Hauck, Steven M. Burns, Gaetano Borriello, Carl Ebeling

IEEE Des. Test Comput., 1994

Bounded delay timing analysis of a class of CSP programs with choice.

Henrik Hulgaard, Steven M. Burns

Proceedings of the International Symposium on Advanced Research in Asynchronous Circuits and Systems, 1994

1993

Practical applications of an efficient time separation of events algorithm.

Henrik Hulgaard, Steven M. Burns, Tod Amon, Gaetano Borriello

Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993

1992

MONTAGNE: An FPL for Synchronous and Asynchronous Circuits.

Scott Hauck, Gaetano Borriello, Steven M. Burns, Carl Ebeling

Proceedings of the Field-Programmable Gate Arrays: Architectures and Tools for Rapid Prototyping, Second International Workshop on Field-Programmable Logic and Applications, Vienna, Austria, August 31, 1992

1991

Performance analysis and optimization of asynchronous circuits.

Steven Morgan Burns

PhD thesis, 1991

1989

The design of an asynchronous microprocessor.

Alain J. Martin, Steven M. Burns, Tak-Kwan Lee, Drazen Borkovic, Pieter J. Hazewindus

SIGARCH Comput. Archit. News, 1989

The first asynchronous microprocessor: the test results.

Alain J. Martin, Steven M. Burns, Tak-Kwan Lee, Drazen Borkovic, Pieter J. Hazewindus

SIGARCH Comput. Archit. News, 1989