Steven F. Quigley
According to our database1,
Steven F. Quigley
authored at least 23 papers
between 1994 and 2013.
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Bibliography
2013
A fast scalable implementation of the two-dimensional triangular Discrete Element Method on a GPU platform.
Adv. Eng. Softw., 2013
Proceedings of the International Conference on Information Science and Applications, 2013
2011
Int. J. Reconfigurable Comput., 2011
2010
Multi-degree smoother for low power consumption in single and multiple scan-chains BIST.
Proceedings of the 11th International Symposium on Quality of Electronic Design (ISQED 2010), 2010
Proceedings of the Reconfigurable Computing: Architectures, 2010
2009
Bit-Swapping LFSR and Scan-Chain Ordering: A Novel Technique for Peak- and Average-Power Reduction in Scan-Based BIST.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009
2008
An element-by-element preconditioned Conjugate Gradient solver of 3D tetrahedral finite elements on an FPGA coprocessor.
Proceedings of the FPL 2008, 2008
2007
Comput. Networks, 2007
2003
System Level Simulation of a SIMD Active Memory Enhanced PC (Or, Why We Don't Want 100% Bandwidth Utilisation.
Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003
The Impact of Routing Architecture on Reconfiguration Overheads.
Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, June 23, 2003
2002
Performing speech recognition on multiple parallel files using continuous hidden Markov models on an FPGA.
Proceedings of the 2002 IEEE International Conference on Field-Programmable Technology, 2002
Scalable Implementation of the Discrete Element Method on a Reconfigurable Computing Platform.
Proceedings of the Field-Programmable Logic and Applications, 2002
Proceedings of the Field-Programmable Logic and Applications, 2002
Proceedings of the Field-Programmable Logic and Applications, 2002
Analysis and Implementation of the Discrete Element Method Using a Dedicated Highly Parallel Architecture in Reconfigurable Computing.
Proceedings of the 10th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2002), 2002
Proceedings of the 10th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2002), 2002
2001
Proceedings of the Field-Programmable Logic and Applications, 2001
Proceedings of the Field-Programmable Logic and Applications, 2001
2000
Proceedings of the Field-Programmable Logic and Applications, 2000
1999
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999
An investigation of the effect of synapse transfer characteristic on the performance of analogue neural networks.
Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999
1998
A Novel Field Programmable Gat Array Architecture for High Speed Arithmetic Processing.
Proceedings of the Field-Programmable Logic and Applications, 1998
1994
An Analogue CMOS Defuzzication Circuit with Representation of Triangular Membership Functions.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994