Steven Eugene Turner

According to our database, Steven Eugene Turner authored at least 5 papers between 2006 and 2021.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of six.

2021

A Single-Chip 25.3-28.0 GHz SiGe BiCMOS PLL with -134 dBc/Hz Phase Noise at 10 MHz Offset and -96 dBc Reference Spurs.

Mark D. Hickle, Kevin Grout, Curtis Grens, Gregory M. Flewelling, Steven Eugene Turner

Proceedings of the IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium, 2021

2020

Phase Coherent Frequency Hopping in Direct Digital Synthesizers and Phase Locked Loops.

Steven Eugene Turner, Joseph D. Cali

IEEE Trans. Circuits Syst. I Regul. Pap., 2020

2007

36-GHz, 16×6-Bit ROM in InP DHBT Technology Suitable for DDS Application.

Sanjeev Manandhar, Steven Eugene Turner, David E. Kotecki

IEEE J. Solid State Circuits, 2007

2006

Direct Digital Synthesizer With Sine-Weighted DAC at 32-GHz Clock Frequency in InP DHBT Technology.

Steven Eugene Turner, David E. Kotecki

IEEE J. Solid State Circuits, 2006

A 20-GHz and 46-GHz, 32x6-bit ROM for DDS Application in InP DHBT Technology.

Sanjeev Manandhar, Steven Eugene Turner, David E. Kotecki

Proceedings of the 13th IEEE International Conference on Electronics, 2006