Steve Gyger

According to our database1, Steve Gyger authored at least 8 papers between 1999 and 2010.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2010
A 1V RF SoC with an 863-to-928MHz 400kb/s radio and a 32b Dual-MAC DSP core for Wireless Sensor and Body Networks.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

2009
Low-Power 32-bit Dual-MAC 120 µW/MHz 1.0 V icyflex1 DSP/MCU Core.
IEEE J. Solid State Circuits, 2009

An SoC combining a 132dB QVGA pixel array and a 32b DSP/MCU processor for vision applications.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009

2008
Low-Power Heterogeneous Systems-on-Chips.
J. Low Power Electron., 2008

Low-power 32-bit dual-MAC 120 μW/MHz 1.0 V icyflex DSP/MCU core.
Proceedings of the ESSCIRC 2008, 2008

2006

2003
A 128 × 128 pixel 120-dB dynamic-range vision-sensor chip for image contrast and orientation extraction.
IEEE J. Solid State Circuits, 2003

1999
An Oculo-Motor System with Multi-Chip Neuromorphic Analog VLSI Control.
Proceedings of the Advances in Neural Information Processing Systems 12, [NIPS Conference, Denver, Colorado, USA, November 29, 1999


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