Stephen W. Melvin

According to our database, Stephen W. Melvin authored at least 17 papers between 1985 and 2016.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2016

Common Bonds: MIPS, HPS, Two-Level Branch Prediction, and Compressed Code RISC Processor.

Onur Mutlu, Rich Belgard, Thomas R. Gross, Norman P. Jouppi, John L. Hennessy, Steven A. Przybylski, Chris Rowen, Yale N. Patt, Wen-mei W. Hwu, Stephen W. Melvin, Michael Shebanow, Tse-Yu Yeh, Andy Wolfe

IEEE Micro, 2016

2002

Handling of packet dependencies: a critical issue for highly parallel network processors.

Stephen W. Melvin, Yale N. Patt

Proceedings of the International Conference on Compilers, 2002

1995

Enhancing instruction scheduling with a block-structured ISA.

Stephen W. Melvin, Yale N. Patt

Int. J. Parallel Program., 1995

1991

Exploiting Fine-Grained Parallelism Through a Combination of Hardware and Software Techniques.

Stephen W. Melvin, Yale N. Patt

Proceedings of the 18th Annual International Symposium on Computer Architecture. Toronto, 1991

1990

High Resolution Timing with Low Resolution Clocks and A Microsecond Resolution Timer for Sun Workstations.

Peter B. Danzig, Stephen W. Melvin

ACM SIGOPS Oper. Syst. Rev., 1990

1989

Performance benefits of large execution atomic units in dynamically scheduled machines.

Stephen W. Melvin, Yale N. Patt

Proceedings of the 3rd international conference on Supercomputing, 1989

1988

The Use of Microcode Instrumentation for Development, Debugging and Tuning of Operating System Kernels.

Stephen W. Melvin, Yale N. Patt

Proceedings of the 1988 ACM SIGMETRICS conference on Measurement and modeling of computer systems, 1988

Hardware support for large atomic units in dynamically scheduled machines.

Stephen W. Melvin, Michael Shebanow, Yale N. Patt

Proceedings of the 21st Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1988, San Diego, California, USA, November 28, 1988

1987

Aquarius.

Alvin M. Despain, Yale N. Patt, Vason P. Srini, Philip Bitar, William R. Bush, C. Chien, Wayne Citrin, Barry Fagin, Wenwei Hwu, Stephen W. Melvin, Rick McGeer, Ashok Singhal, Michael Shebanow, Peter Van Roy

SIGARCH Comput. Archit. News, 1987

On tuning the microarchitecture of an HPS implementation of the VAX.

James E. Wilson, Stephen W. Melvin, Michael Shebanow, Wen-mei W. Hwu, Yale N. Patt

Proceedings of the 20st Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1987

SPAM: a microcode based tool for tracing operating system events.

Stephen W. Melvin, Yale N. Patt

Proceedings of the 20st Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1987

Advantages of Implementing PROLOG by Microprogramming a Host General Purpose Computer.

Jeffrey D. Gee, Stephen W. Melvin, Yale N. Patt

Proceedings of the Logic Programming, 1987

1986

Run-time generation of HPS microinstructions from a VAX instruction stream.

Yale N. Patt, Stephen W. Melvin, Wen-mei W. Hwu, Michael Shebanow, Chein Chen

Proceedings of the 19th annual workshop on Microprogramming, 1986

A microcode-based environment for noninvasive performance analysis.

Stephen W. Melvin, Yale N. Patt

Proceedings of the 19th annual workshop on Microprogramming, 1986

The implementation of Prolog via VAX 8600 microcode.

Jeffrey D. Gee, Stephen W. Melvin, Yale N. Patt

Proceedings of the 19th annual workshop on Microprogramming, 1986

Experiments with HPS, a Restricted Data Flow Microarchitecture for High Performance Computers.

Yale N. Patt, Wen-mei W. Hwu, Stephen W. Melvin, Michael Shebanow, Chein Chen, Jiajuin Wei

Proceedings of the Spring COMPCON'86, 1986

1985

Critical issues regarding HPS, a high performance microarchitecture.

Yale N. Patt, Stephen W. Melvin, Wen-mei W. Hwu, Michael Shebanow

Proceedings of the 18th annual workshop on Microprogramming, 1985