Stephen Nease
According to our database1,
Stephen Nease
authored at least 14 papers
between 2012 and 2016.
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Bibliography
2016
IEEE Trans. Very Large Scale Integr. Syst., 2016
Learning in Silicon Beyond STDP: A Neuromorphic Implementation of Multi-Factor Synaptic Plasticity With Calcium-Based Dynamics.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Proceedings of the 11th European Workshop on Microelectronics Education, 2016
2015
PhD thesis, 2015
Power-efficient estimation of silicon neuron firing rates with floating-gate transistors.
Proceedings of the European Conference on Circuit Theory and Design, 2015
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2015
2013
A Learning-Enabled Neuron Array IC Based Upon Transistor Channel Models of Biological Phenomena.
IEEE Trans. Biomed. Circuits Syst., 2013
Computing with networks of spiking neurons on a biophysically motivated floating-gate based neuromorphic integrated circuit.
Neural Networks, 2013
Proceedings of the 21st European Conference on Circuit Theory and Design, 2013
2012
Modeling and Implementation of Voltage-Mode CMOS Dendrites on a Reconfigurable Analog Platform.
IEEE Trans. Biomed. Circuits Syst., 2012
A Digitally Enhanced Dynamically Reconfigurable Analog Platform for Low-Power Signal Processing.
IEEE J. Solid State Circuits, 2012
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012