Stephen I. Long

According to our database1, Stephen I. Long authored at least 20 papers between 1987 and 2007.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2007
A GaN HEMT Class F Amplifier at 2 GHz With > 80% PAE.
IEEE J. Solid State Circuits, 2007

2006
Power Amplifier Selection for LINC Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2006

2005
Design analysis and circuit enhancements for high-speed bipolar flip-flops.
IEEE J. Solid State Circuits, 2005

2000
Broadband GaAs MESFET and GaN HEMT resistive feedback power amplifiers.
IEEE J. Solid State Circuits, 2000

1999
Logic Design Principles and Examples.
Proceedings of the VLSI Handbook., 1999

Materials.
Proceedings of the VLSI Handbook., 1999

Design of MESFET and HEMT Logic Circuits.
Proceedings of the VLSI Handbook., 1999

48-GHz digital ICs and 85-GHz baseband amplifiers using transferred-substrate HBT's.
IEEE J. Solid State Circuits, 1999

Ultra high frequency integrated circuits using transferred substrate heterojunction bipolar transistors.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

Wave Steering in YADDs: A Novel Non-Iterative Synthesis and Layout Technique.
Proceedings of the 36th Conference on Design Automation, 1999

Wave pipelining YADDs-a feasibility study.
Proceedings of the IEEE 1999 Custom Integrated Circuits Conference, 1999

1997
Low power GaAs current-mode 1.2 Gb/s interchip interconnections.
IEEE J. Solid State Circuits, 1997

1996
A low-power 128×1-bit GaAs FIFO for ATM packet switcher.
IEEE J. Solid State Circuits, 1996

1995
Design and performance of multistage GaAs dynamic logic.
IEEE J. Solid State Circuits, May, 1995

A High-Speed Interconnect Network Using Ternary Logic.
Proceedings of the 25th IEEE International Symposium on Multiple-Valued Logic, 1995

1990
Gallium arsenide digital integrated circuit design.
McGraw-Hill, ISBN: 978-0-07-100792-4, 1990

1989
Simplified linear representation of logic gate terminal impedances for use in interconnect crosstalk calculations.
IEEE J. Solid State Circuits, October, 1989

1988
Noise-margin limitations on gallium-arsenide VLSI.
IEEE J. Solid State Circuits, August, 1988

A GaAs 4-bit adder-accumulator circuit for direct digital synthesis.
IEEE J. Solid State Circuits, April, 1988

1987
System Architecture of a Gallium Arsenide One-Gigahertz Digital IC Tester.
Computer, 1987


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