Stephen Adeboye Oyeniran

According to our database, Stephen Adeboye Oyeniran authored at least 22 papers between 2015 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2022

High-Level Fault Diagnosis in RISC Processors with Implementation-Independent Functional Test.

Adeboye Stephen Oyeniran, Maksim Jenihhin, Jaan Raik, Raimund Ubar

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022

2021

Implementation-Independent Test Generation for a Large Class of Faults in RISC Processor Modules.

Maksim Jenihhin, Adeboye Stephen Oyeniran, Jaan Raik, Raimund Ubar

Proceedings of the 24th Euromicro Conference on Digital System Design, 2021

2020

High-Level Implementation-Independent Functional Software-Based Self-Test for RISC Processors.

Adeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin, Jaan Raik

J. Electron. Test., 2020

Implementation-Independent Functional Test for Transition Delay Faults in Microprocessors.

Adeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin, Jaan Raik

Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020

2019

High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors.

Adeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin, Cemil Cem Gürsoy, Jaan Raik

CoRR, 2019

On Test Generation for Microprocessors for Extended Class of Functional Faults.

Adeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin, Jaan Raik

Proceedings of the VLSI-SoC: New Technology Enabler, 2019

Implementation-Independent Functional Test Generation for MSC Microprocessors.

Adeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin, Jaan Raik

Proceedings of the 27th IFIP/IEEE International Conference on Very Large Scale Integration, 2019

High-Level Functional Test Generation for Microprocessor Modules.

Adeboye Stephen Oyeniran, Raimund Ubar

Proceedings of the 26th International Conference on Mixed Design of Integrated Circuits and Systems, 2019

Mixed-level identification of fault redundancy in microprocessors.

Adeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin, Cemil Cem Gürsoy, Jaan Raik

Proceedings of the IEEE Latin American Test Symposium, 2019

Application Specific True Critical Paths Identification in Sequential Circuits.

Lembit Jürimägi, Raimund Ubar, Maksim Jenihhin, Jaan Raik, Sergei Devadze, Adeboye Stephen Oyeniran

Proceedings of the 25th IEEE International Symposium on On-Line Testing and Robust System Design, 2019

High-Level Combined Deterministic and Pseudo-exhuastive Test Generation for RISC Processors.

Adeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin, Cemil Cem Gürsoy, Jaan Raik

Proceedings of the 24th IEEE European Test Symposium, 2019

New categories of Safe Faults in a processor-based Embedded System.

Cemil Cem Gürsoy, Maksim Jenihhin, Adeboye Stephen Oyeniran, Davide Piumatti, Jaan Raik, Matteo Sonza Reorda, Raimund Ubar

Proceedings of the 22nd IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2019

2018

Parallel Pseudo-Exhaustive Testing of Array Multipliers with Data-Controlled Segmentation.

Adeboye Stephen Oyeniran, Siavoosh Payandeh Azad, Raimund Ubar

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Replication-Based Deterministic Testing of 2-Dimensional Arrays with Highly Interrelated Cells.

Siavoosh Payandeh Azad, Adeboye Stephen Oyeniran, Raimund Ubar

Proceedings of the 21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2018

Combined pseudo-exhaustive and deterministic testing of array multipliers.

Adeboye Stephen Oyeniran, Siavoosh Payandeh Azad, Raimund Ubar

Proceedings of the IEEE International Conference on Automation, 2018

2017

High-level test generation for processing elements in many-core systems.

Stephen Adeboye Oyeniran, Raimund Ubar, Siavoosh Payandeh Azad, Jaan Raik

Proceedings of the 12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2017

High-level test data generation for software-based self-test in microprocessors.

Adeboye Stephen Oyeniran, Artjom Jasnetski, Anton Tsertov, Raimund Ubar

Proceedings of the 6th Mediterranean Conference on Embedded Computing, 2017

From online fault detection to fault management in Network-on-Chips: A ground-up approach.

Siavoosh Payandeh Azad, Behrad Niazmand, Karl Janson, Nevin George, Stephen Adeboye Oyeniran, Tsotne Putkaradze, Apneet Kaur, Jaan Raik, Gert Jervan, Raimund Ubar, Thomas Hollstein

Proceedings of the 20th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2017

2016

High-level modeling and testing of multiple control faults in digital systems.

Artjom Jasnetski, Stephen Adeboye Oyeniran, Anton Tsertov, Mario Schölzel, Raimund Ubar

Proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2016

Multiple control fault testing in digital systems with high-level decision diagrams.

Raimund Ubar, Stephen Adeboye Oyeniran

Proceedings of the IEEE International Conference on Automation, 2016

2015

Multiple fault testing in systems-on-chip with high-level decision diagrams.

Raimund Ubar, Stephen Adeboye Oyeniran, Mario Schölzel, Heinrich Theodor Vierhaus

Proceedings of the 10th International Design & Test Symposium, 2015

Double Phase Fault Collapsing with Linear Complexity in Digital Circuits.

Raimund Ubar, Lembit Jurimagi, Elmet Orasson, Galina Josifovska, Stephen Adeboye Oyeniran

Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015