Stephen A. Edwards

ACM Trans. Embed. Comput. Syst., September, 2024

2023

Timestamp Peripherals for Precise Real-Time Programming.

[BibT_eX]

[DOI]

Kyle J. Edwards

Proceedings of the 21st ACM-IEEE International Symposium on Formal Methods and Models for System Design, 2023

Logical Time for Reactive Software.

[BibT_eX]

[DOI]

Proceedings of Cyber-Physical Systems and Internet of Things Week 2023, 2023

Towards Sparse Synchronous Programming in Lua.

[BibT_eX]

[DOI]

Proceedings of Cyber-Physical Systems and Internet of Things Week 2023, 2023

2022

C Program Partitioning with Fine-Grained Security Constraints and Post-Partition Verification.

[BibT_eX]

[DOI]

Proceedings of the IEEE Military Communications Conference, 2022

Creating a Language for Writing Real-Time Applications for the Internet of Things.

[BibT_eX]

[DOI]

Proceedings of the 20th ACM-IEEE International Conference on Formal Methods and Models for System Design, 2022

Synthesized In-BramGarbage Collection for Accelerators with Immutable Memory.

[BibT_eX]

[DOI]

Martha Barker

Proceedings of the 32nd International Conference on Field-Programmable Logic and Applications, 2022

Synthesized Garbage Collection for FPGA Accelerators.

[BibT_eX]

[DOI]

Martha Barker

Proceedings of the FPGA '22: The 2022 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Virtual Event, USA, 27 February 2022, 2022

2020

The Sparse Synchronous Model.

[BibT_eX]

[DOI]

Proceedings of the Forum for Specification and Design Languages, 2020

2019

Compositional Dataflow Circuits.

[BibT_eX]

[DOI]

ACM Trans. Embed. Comput. Syst., 2019

Master of none acceleration: a comparison of accelerator architectures for analytical query processing.

[BibT_eX]

[DOI]

Proceedings of the 46th International Symposium on Computer Architecture, 2019

2018

Further Experiences Teaching an FPGA-Based Embedded Systems Class.

[BibT_eX]

[DOI]

Proceedings of the Cyber Physical Systems. Model-Based Design - 8th International Workshop, 2018

On Determinism.

[BibT_eX]

[DOI]

Proceedings of the Principles of Modeling, 2018

2017

Compositional dataflow circuits.

[BibT_eX]

[DOI]

Richard Townsend

Proceedings of the 15th ACM-IEEE International Conference on Formal Methods and Models for System Design, 2017

Deadlock-free joins in DB-mesh, an asynchronous systolic array accelerator.

[BibT_eX]

[DOI]

Proceedings of the 13th International Workshop on Data Management on New Hardware, 2017

Network Synthesis for Database Processing Units.

[BibT_eX]

[DOI]

Proceedings of the 54th Annual Design Automation Conference, 2017

From functional programs to pipelined dataflow circuits.

[BibT_eX]

[DOI]

Richard Townsend

Proceedings of the 26th International Conference on Compiler Construction, 2017

2015

Implementing latency-insensitive dataflow blocks.

[BibT_eX]

[DOI]

Proceedings of the 13. ACM/IEEE International Conference on Formal Methods and Models for Codesign, 2015

Hardware synthesis from a recursive functional language.

[BibT_eX]

[DOI]

Proceedings of the 2015 International Conference on Hardware/Software Codesign and System Synthesis, 2015

2014

MEMOCODE 2014 software design contest: Space Invaders emulator.

[BibT_eX]

[DOI]

Hiren D. Patel

Proceedings of the Twelfth ACM/IEEE International Conference on Formal Methods and Models for Codesign, 2014

2013

Synchronous Programming (Dagstuhl Seminar 13471).

[BibT_eX]

[DOI]

Alain Girault

Klaus Schneider

Dagstuhl Reports, 2013

2012

Cache Impacts of Datatype Acceleration.

[BibT_eX]

[DOI]

Lisa Wu

IEEE Comput. Archit. Lett., 2012

MEMOCODE 2012 hardware/software codesign contest: DNA sequence aligner.

[BibT_eX]

[DOI]

Proceedings of the Tenth ACM/IEEE International Conference on Formal Methods and Models for Codesign, 2012

2011

Preface.

[BibT_eX]

[DOI]

Ryszard Janicki

Walter Vogler

Fundam. Informaticae, 2011

2010

Buffer Sharing in Rendezvous Programs.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010

A novel analysis space for pointer analysis and its application for bug finding.

[BibT_eX]

[DOI]

Sci. Comput. Program., 2010

Computation vs. Memory Systems: Pinning Down Accelerator Bottlenecks.

[BibT_eX]

[DOI]

Proceedings of the Computer Architecture, 2010

Ensuring deterministic concurrency through compilation.

[BibT_eX]

[DOI]

Proceedings of the 24th IEEE International Symposium on Parallel and Distributed Processing, 2010

Simple and fast biased locks.

[BibT_eX]

[DOI]

Kedar S. Namjoshi

Proceedings of the 19th International Conference on Parallel Architectures and Compilation Techniques, 2010

Compiling SHIM.

[BibT_eX]

[DOI]

Proceedings of the Synthesis of Embedded Software, 2010

2009

Synthesis and Optimization of Pipelined Packet Processors.

[BibT_eX]

[DOI]

Ilija Hadzic

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009

Concurrency and Communication: Lessons from the SHIM Project.

[BibT_eX]

[DOI]

Proceedings of the Software Technologies for Embedded and Ubiquitous Systems, 2009

Celling SHIM: compiling deterministic concurrency to a heterogeneous multicore.

[BibT_eX]

[DOI]

Proceedings of the 2009 ACM Symposium on Applied Computing (SAC), 2009

Buffer sharing in CSP-like programs.

[BibT_eX]

[DOI]

Proceedings of the 7th ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE 2009), 2009

A disruptive computer design idea: Architectures with repeatable timing.

[BibT_eX]

[DOI]

Proceedings of the 27th International Conference on Computer Design, 2009

Compositional deadlock detection for rendezvous communication.

[BibT_eX]

[DOI]

Baolin Shao

Proceedings of the 9th ACM & IEEE International conference on Embedded software, 2009

09481 Abstracts Collection - SYNCHRON 2009.

[BibT_eX]

[DOI]

Reinhard von Hanxleden

Proceedings of the SYNCHRON 2009, 22.11. - 27.11.2009, 2009

Compile-Time Analysis and Specialization of Clocks in Concurrent Programs.

[BibT_eX]

[DOI]

Proceedings of the Compiler Construction, 18th International Conference, 2009

Languages for Design and Verification.

[BibT_eX]

[DOI]

Proceedings of the Embedded Systems Design and Verification, 2009

2008

Transforming Cyclic Circuits Into Acyclic Equivalents.

[BibT_eX]

[DOI]

Osama Neiroukh

Xiaoyu Song

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

Flexible pointer analysis using assign-fetch graphs.

[BibT_eX]

[DOI]

Proceedings of the 2008 ACM Symposium on Applied Computing (SAC), 2008

Static elaboration of recursion for concurrent software.

[BibT_eX]

[DOI]

Proceedings of the 2008 ACM SIGPLAN Symposium on Partial Evaluation and Semantics-based Program Manipulation, 2008

Static Deadlock Detection for the SHIM Concurrent Language.

[BibT_eX]

[DOI]

Proceedings of the 6th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2008), 2008

A deterministic multi-way rendezvous library for haskell.

[BibT_eX]

[DOI]

Satnam Singh

Proceedings of the 22nd IEEE International Symposium on Parallel and Distributed Processing, 2008

Programming Shared Memory Multiprocessors with Deterministic Message-Passing Concurrency: Compiling SHIM to Pthreads.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2008

Predictable programming on a precision timed architecture.

[BibT_eX]

[DOI]

Proceedings of the 2008 International Conference on Compilers, 2008

2007

Optimizing Sequential Cycles Through Shannon Decomposition and Retiming.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

Instantaneous Transitions in Esterel.

[BibT_eX]

[DOI]

Proceedings of the International Workshop on Model-driven High-level Programming of Embedded Systems, 2007

Code Generation in the Columbia Esterel Compiler.

[BibT_eX]

[DOI]

EURASIP J. Embed. Syst., 2007

The Case for the Precision Timed (PRET) Machine.

[BibT_eX]

[DOI]

Edward A. Lee

Proceedings of the 44th Design Automation Conference, 2007

Compiling Esterel.

[BibT_eX]

[DOI]

Dumitru Potop-Butucaru

Gérard Berry

Springer, ISBN: 978-0-387-70626-9, 2007

2006

SHIM: a deterministic model for heterogeneous embedded systems.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2006

A Domain-Specific Language for Generating Dataflow Analyzers.

[BibT_eX]

[DOI]

Chuck Mitchell

Proceedings of the Sixth Workshop on Language Descriptions, Tools, and Applications, 2006

The Challenges of Synthesizing Hardware from C-Like Languages.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2006

Using program specialization to speed SystemC fixed-point simulation.

[BibT_eX]

[DOI]

Proceedings of the 2006 ACM SIGPLAN Workshop on Partial Evaluation and Semantics-based Program Manipulation, 2006

R-SHIM: deterministic concurrency with recursion and shared variables.

[BibT_eX]

[DOI]

Proceedings of the 4th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2006), 2006

Efficient code generation from SHIM models.

[BibT_eX]

[DOI]

Proceedings of the 2006 ACM SIGPLAN/SIGBED Conference on Languages, 2006

An Efficient Algorithm for the Analysis of Cyclic Circuits.

[BibT_eX]

[DOI]

Osama Neiroukh

Xiaoyu Song

Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006

A Processor Extension for Cycle-Accurate Real-Time Software.

[BibT_eX]

[DOI]

Nicholas Jun Hao Ip

Proceedings of the Embedded and Ubiquitous Computing, International Conference, 2006

Scheduling-independent threads and exceptions in SHIM.

[BibT_eX]

[DOI]

Proceedings of the 6th ACM & IEEE International conference on Embedded software, 2006

Synthesis of high-performance packet processing pipelines.

[BibT_eX]

[DOI]

Ilija Hadzic

Proceedings of the 43rd Design Automation Conference, 2006

2005

Languages for Embedded Systems.

[BibT_eX]

[DOI]

Proceedings of the Embedded Systems Handbook., 2005

Experiences teaching an FPGA-based embedded systems class.

[BibT_eX]

[DOI]

SIGBED Rev., 2005

Pointer Analysis for Source-to-Source Transformations.

[BibT_eX]

[DOI]

Proceedings of the 5th IEEE International Workshop on Source Code Analysis and Manipulation (SCAM 2005), 30 September, 2005

Deterministic receptive processes are Kahn processes.

[BibT_eX]

[DOI]

Proceedings of the 3rd ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2005), 2005

Separate Compilation for Synchronous Modules.

[BibT_eX]

[DOI]

Proceedings of the Embedded Software and Systems, Second International Conference, 2005

The Challenges of Hardware Synthesis from C-Like Languages.

[BibT_eX]

[DOI]

Proceedings of the 2005 Design, 2005

Incremental Algorithms for Inter-procedural Analysis of Safety Properties.

[BibT_eX]

[DOI]

Christopher L. Conway

Kedar S. Namjoshi

Dennis Dams

Proceedings of the Computer Aided Verification, 17th International Conference, 2005

Approximate Reachability for Dead Code Elimination in Esterel.

[BibT_eX]

[DOI]

Proceedings of the Automated Technology for Verification and Analysis, 2005

2004

Compiling Esterel into Static Discrete-Event Code.

[BibT_eX]

[DOI]

Vimal Kapadia

Michael Halasz

Proceedings of the Third International Workshop on Synchronous Languages, 2004

Generating fast code from concurrent program dependence graphs.

[BibT_eX]

[DOI]

Proceedings of the 2004 ACM SIGPLAN/SIGBED Conference on Languages, 2004

NDL: a domain-specific language for device drivers.

[BibT_eX]

[DOI]

Christopher L. Conway

Proceedings of the 2004 ACM SIGPLAN/SIGBED Conference on Languages, 2004

04491 Executive Summary - Synchronous Programming - SYNCHRON'04.

[BibT_eX]

[DOI]

Nicolas Halbwachs

Reinhard von Hanxleden

Thomas Stauner

Proceedings of the Synchronous Programming - SYNCHRON'04, 28. November - 3. December 2004, 2004

04491 Abstracts Collection - Synchronous Programming - SYNCHRON'04.

[BibT_eX]

[DOI]

Nicolas Halbwachs

Reinhard von Hanxleden

Thomas Stauner

Proceedings of the Synchronous Programming - SYNCHRON'04, 28. November - 3. December 2004, 2004

SHIM: A Language for Hardware/Software Integration.

[BibT_eX]

[DOI]

Proceedings of the Synchronous Programming - SYNCHRON'04, 28. November - 3. December 2004, 2004

2003

Tutorial: Compiling concurrent languages for sequential processors.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2003

The semantics and execution of a synchronous block-diagram language.

[BibT_eX]

[DOI]

Edward A. Lee

Sci. Comput. Program., 2003

The synchronous languages 12 years later.

[BibT_eX]

[DOI]

Proc. IEEE, 2003

High Level Modeling and Validation Methodologies for Embedded Systems: Bridging the Productivity Gap.

[BibT_eX]

[DOI]

Proceedings of the 16th International Conference on VLSI Design (VLSI Design 2003), 2003

Porting a Network Cryptographic Service to the RMC2000: A Case Study in Embedded Software Development.

[BibT_eX]

[DOI]

Stephen Jan

Paolo de Dios

Proceedings of the 2003 Design, 2003

Making cyclic circuits acyclic.

[BibT_eX]

[DOI]

Proceedings of the 40th Design Automation Conference, 2003

Porting a Network Cryptographic Service to the RMC2000.

[BibT_eX]

[DOI]

Stephen Jan

Paolo de Dios

Proceedings of the Embedded Software for SoC, 2003

2002

An Esterel compiler for large control-dominated systems.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002

High-Level Synthesis from the Synchronous Language Esterel.

[BibT_eX]

Proceedings of the 11th IEEE/ACM International Workshop on Logic & Synthesis, 2002

1999

Compiling Esterel into sequential code.

[BibT_eX]

[DOI]

Proceedings of the Seventh International Workshop on Hardware/Software Codesign, 1999

1998

Efficient Verification and Synthesis using Design Commonalities.

[BibT_eX]

[DOI]

Gitanjali Swamy

Robert K. Brayton

Proceedings of the 11th International Conference on VLSI Design (VLSI Design 1991), 1998

1997

Design of embedded systems: formal models, validation, and synthesis.

[BibT_eX]

[DOI]