Stéphane Emery
Orcid: 0000-0001-9201-8459Affiliations:
- Swiss Center for Electronics and Microtechnology (CSEM), Neuchâtel, Switzerland
According to our database1,
Stéphane Emery
authored at least 16 papers
between 2016 and 2023.
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Bibliography
2023
An Ultra-Low-Power Serial Implementation for Sigmoid and Tanh Using CORDIC Algorithm.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
2022
ACM Trans. Embed. Comput. Syst., September, 2022
2021
IEEE Embed. Syst. Lett., 2021
A Sub-mW Dual-Engine ML Inference System-on-Chip for Complete End-to-End Face-Analysis at the Edge.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021
Proceedings of the 19th IEEE International New Circuits and Systems Conference, 2021
Comparison of Capacitive DAC Architectures for Power and Area Efficient SAR ADC Designs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Ultra-low-power Physical Activity Classifier for Wearables: From Generic MCUs to ASICs.
Proceedings of the 43rd Annual International Conference of the IEEE Engineering in Medicine & Biology Society, 2021
Single-Battery Cooperative Sensors For Multi-Lead Long Term Ambulatory ECG Measurement.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, BioCAS 2021, 2021
2019
Minimum Energy Point in Constant Frequency Designs under Adaptive Supply Voltage and Body Bias Adjustment in 55 nm DDC.
Proceedings of the 15th Conference on Ph.D. Research in Microelectronics and Electronics, 2019
Energy-Autonomous MCU Operating in sub-VT Regime with Tightly-Integrated Energy-Harvester : A SoC for IoT smart nodes containing a MCU with minimum-energy point of 2.9pJ/cycle and a harvester with output power range from sub-µW to 4.32mW.
Proceedings of the 2019 IEEE/ACM International Symposium on Low Power Electronics and Design, 2019
A 20 Channel EMG SoC with an Integrated 32b RISC Core for Real-Time Wireless Prosthetic Control.
Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019
A 0.5 V 2.5 μW/MHz Microcontroller with Analog-Assisted Adaptive Body Bias PVT Compensation with 3.13nW/kB SRAM Retention in 55nm Deeply-Depleted Channel CMOS.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2019
An Untrimmed PVT-Robust 12-bit 1-MS/s SAR ADC IP in 55nm Deeply Depleted Channel CMOS Process.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2019
2018
BinaryEye: A 20 kfps Streaming Camera System on FPGA with Real-Time On-Device Image Recognition Using Binary Neural Networks.
Proceedings of the 13th IEEE International Symposium on Industrial Embedded Systems, 2018
2017
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
2016
Sub-threshold latch-based icyflex2 32-bit processor with wide supply range operation.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016