Stéphan Jourdan
According to our database1,
Stéphan Jourdan
authored at least 15 papers
between 1995 and 2014.
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Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2014
2009
Transitioning the Intel® next generation microarchitectures (nehalem and westmere) into the mainstream.
Proceedings of the 2009 IEEE Hot Chips 21 Symposium (HCS), 2009
2002
Proceedings of the 10th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-X), 2002
2001
An Exploration of Instruction Fetch Requirement in Out-of-Order Superscalar Processors.
Int. J. Parallel Program., 2001
2000
Proceedings of the 27th International Symposium on Computer Architecture (ISCA 2000), 2000
Proceedings of the Sixth International Symposium on High-Performance Computer Architecture, 2000
1999
Proceedings of the 26th Annual International Symposium on Computer Architecture, 1999
Proceedings of the 26th Annual International Symposium on Computer Architecture, 1999
Exploring Instruction-Fetch Bandwidth Requirement in Wide-Issue Superscalar Processors.
Proceedings of the 1999 International Conference on Parallel Architectures and Compilation Techniques, 1999
1998
A Novel Renaming Scheme to Exploit Value Temporal Locality Through Physical Register Reuse and Unification.
Proceedings of the 31st Annual IEEE/ACM International Symposium on Microarchitecture, 1998
1997
Recovery requirements of branch prediction storage structures in the presence of mispredicted-path execution.
Int. J. Parallel Program., 1997
1996
Proceedings of the ASPLOS-VII Proceedings, 1996
Proceedings of the Fifth International Conference on Parallel Architectures and Compilation Techniques, 1996
1995
Proceedings of the 28th Annual International Symposium on Microarchitecture, Ann Arbor, Michigan, USA, November 29, 1995
Exploring Configurations of Functional Units in an Out-of-Order Superscalar Processor.
Proceedings of the 22nd Annual International Symposium on Computer Architecture, 1995