Stephan Henker

According to our database¹, Stephan Henker authored at least 20 papers between 2003 and 2023.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of three.

Timeline

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In proceedings

Article

PhD thesis

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On csauthors.net:

Bibliography

2023

A 3.3V Saturation-Aware Neurostimulator with Reset Functionality in 22 nm FDSOI.

[BibT_eX]

[DOI]

Franz Marcus Schüffny

Stefan Hänzsche

Stephan Henker

Seyed Mohammad Ali Zeinolabedin

Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023

2020

Adaptive Body Bias Aware Implementation for Ultra-Low-Voltage Designs in 22FDX Technology.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2020

2017

A Heterogeneous SDR MPSoC in 28 nm CMOS for Low-Latency Wireless Applications.

[BibT_eX]

[DOI]

Proceedings of the 54th Annual Design Automation Conference, 2017

2016

An MPSoC for energy-efficient database query processing.

[BibT_eX]

[DOI]

Proceedings of the 53rd Annual Design Automation Conference, 2016

2015

An Energy Efficient Multi-Gbit/s NoC Transceiver Architecture With Combined AC/DC Drivers and Stoppable Clocking in 65 nm and 28 nm CMOS.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2015

2014

Towards Computation with Microchemomechanical Systems.

[BibT_eX]

[DOI]

Int. J. Found. Comput. Sci., 2014

OTA based 200 GΩ resistance on 700 μm2 in 180 nm CMOS for neuromorphic applications.

[BibT_eX]

[DOI]

CoRR, 2014

A compact on-chip IR-drop measurement system in 28 nm CMOS technology.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

Integrated circuits processing chemical information: Prospects and challenges.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013

A Compact Clock Generator for Heterogeneous GALS MPSoCs in 65-nm CMOS Technology.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2013

2012

Accuracy evaluation of numerical methods used in state-of-the-art simulators for spiking neural networks.

[BibT_eX]

[DOI]

Stephan Henker

Johannes Partzsch

René Schüffny

J. Comput. Neurosci., 2012

A 32 GBit/s communication SoC for a waferscale neuromorphic system.

[BibT_eX]

[DOI]

Integr., 2012

A source-synchronous 90Gb/s capacitively driven serial on-chip link over 6mm in 65nm CMOS.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

A 14 bit self-calibrating charge redistribution SAR ADC.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011

Live demonstration: Packet-based AER with 3Gevent/s cumulative throughput.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Strategies for initial sizing and operating point analysis of analog circuits.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2011

2010

Highly integrated packet-based AER communication infrastructure with 3Gevent/S throughput.

[BibT_eX]

[DOI]

Proceedings of the 17th IEEE International Conference on Electronics, 2010

2009

A novel ADPLL design using successive approximation frequency control.

[BibT_eX]

[DOI]

Microelectron. J., 2009

Current conveyor based amplifier and adaptive buffer for use in an analog frontend.

[BibT_eX]

[DOI]

Proceedings of the 16th IEEE International Conference on Electronics, 2009

2003

Concept of Color Correction on Multi-Channel CMOS Sensors.

[BibT_eX]

[DOI]

Stephan Henker

Jens-Uwe Schluessler

René Schüffny

Proceedings of the Seventh International Conference on Digital Image Computing: Techniques and Applications, 2003

Stephan Henker

Timeline

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Links

On csauthors.net:

Bibliography

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