Steffen Rülke

According to our database, Steffen Rülke authored at least 24 papers between 1990 and 2012.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2012

Bounded model checking of Contiki applications.

Thilo Vörtler, Steffen Rülke, Petra Hofstedt

Proceedings of the IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2012

2009

Advanced verification by automatic property generation.

Frank Rogin, Thomas Klotz, Görschwin Fey, Rolf Drechsler, Steffen Rülke

IET Comput. Digit. Tech., 2009

Automatic debugging of System-on-a-Chip designs.

Frank Rogin, Rolf Drechsler, Steffen Rülke

Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009

2008

GePaRD - A High-Level Generation Flow for Partially Reconfigurable Designs.

Maik Boden, Thomas Fiebig, Markus Reiband, Peter Reichel, Steffen Rülke

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2008

Automatic Generation of Complex Properties for Hardware Designs.

Frank Rogin, Thomas Klotz, Görschwin Fey, Rolf Drechsler, Steffen Rülke

Proceedings of the Design, Automation and Test in Europe, 2008

2007

A Tailored Design Partitioning Method for Hardware Emulation.

Rene Beckert, Thomas Fuchs, Steffen Rülke, Wolfram Hardt

Proceedings of the 18th IEEE International Workshop on Rapid System Prototyping (RSP 2007), 2007

High-Level Synthesis of HW Tasks Targeting Run-Time Reconfigurable FPGAs.

Maik Boden, Thomas Fiebig, Torsten Meibner, Steffen Rülke, Jürgen Becker

Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007

An Integrated SystemC Debugging Environment.

Frank Rogin, Christian Genz, Rolf Drechsler, Steffen Rülke

Proceedings of the Forum on specification and Design Languages, 2007

A Run-Time Scheduling Framework for a Reconfigurable Hardware Emulator.

Rene Beckert, Thomas Fuchs, Steffen Rülke, Wolfram Hardt

Proceedings of the Tenth Euromicro Conference on Digital System Design: Architectures, 2007

2006

A high-level target-precise model for designing reconfigurable HW tasks.

Maik Boden, Steffen Rülke, Jürgen Becker

Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

Non-Intrusive High-level SystemC Debugging.

Frank Rogin, Erhard Fehlauer, Steffen Rülke, Sebastian Ohnewald, Thomas Berndt

Proceedings of the Forum on specification and Design Languages, 2006

2005

A Low-Cost Realization of an Adaptable Protocol Processing Unit.

Maik Boden, Alex Gleich, Steffen Rülke, Ulrich Nageldinger

Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), 2005

2004

Demonstrator: Reuse Automation for Reconfigurable System-on-Chip Design within a DVB Environment.

Jörg Schneider, Vincent Kotzsch, Steffen Rülke

Proceedings of the 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 2004

IPQ: IP Qualification for Efficient System Design.

Hans-Jürgen Brand, Steffen Rülke, Martin Radetzki

Proceedings of the 5th International Symposium on Quality of Electronic Design (ISQED 2004), 2004

Cost-Efficient Implementation of Adaptive Finite State Machines.

Maik Boden, Manfred Koegst, José Luis Tiburcio Badía, Steffen Rülke

Proceedings of the 2004 Euromicro Symposium on Digital Systems Design (DSD 2004), Architectures, Methods and Tools, 31 August, 2004

2002

Eine wiederverwendungsgerechte Entwurfsmethodik für rekonfigurierbare SoC-Architekturen.

Jörg Schneider, Maik Boden, Steffen Rülke

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2002

Use of HDL Code Checkers to Support the IP Entrance Check - A Requirement Analysis.

Ronny Frevert, Steffen Rülke, Torsten Schäfer, Frank Dresig

Proceedings of the 2002 Euromicro Symposium on Digital Systems Design (DSD 2002), 2002

Enhanced Reusability for SoC-Based HW/SW Co-Design.

Maik Boden, Jörg Schneider, Klaus Feske, Steffen Rülke

Proceedings of the 2002 Euromicro Symposium on Digital Systems Design (DSD 2002), 2002

2001

Two-Criterial Constraint-Driven FSM State Encoding for Low Power.

Manfred Koegst, Steffen Rülke, Günter Franke, Maria J. Avedillo

Proceedings of the Euromicro Symposium on Digital Systems Design 2001 (Euro-DSD 2001), 2001

1998

Verringerung der Leistungsaufnahme in sequentiellen Schaltungen durch Vorlogik und zweistufige Zustandskodierung.

Manfred Koegst, Günter Franke, Klaus Feske, Steffen Rülke

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 1998

FPGA based prototyping using a target driven FSM partitioning strategy.

Klaus Feske, Steffen Rülke, Manfred Koegst

Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998

Multi-Criterial State Assignment for Low Power FSM Design.

Manfred Koegst, Günter Franke, Steffen Rülke, Klaus Feske

Proceedings of the 24th EUROMICRO '98 Conference, 1998

1997

Low Power Design of FSMs by State Assignment and Disabling Self-Loops.

Manfred Koegst, Günter Franke, Steffen Rülke, Klaus Feske

Proceedings of the 23rd EUROMICRO Conference '97, 1997

1990

EASY - ein Werkzeug zur Unterstützung der automatischen High-Level-Synthese des Datenteils digitaler Systeme: Konzeption und Implementierung einer Experimentalversion.

Steffen Rülke

PhD thesis, 1990